XK-1A port toggling speed

Technical questions regarding the XTC tools and programming with XMOS.
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cicga
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Joined: Tue Oct 11, 2011 4:48 pm

XK-1A port toggling speed

Post by cicga »

what max speed one can toggle port?
I am using:

while(1){
port<:1;
port<0;
port<:1;
port<0;
port<:1;
port<0;
...
}

period is 80ns = 12.5Mhz. should it be 100Mhz maximum?


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Bianco
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Post by Bianco »

You will need to use buffered ports to attain higher speeds.
Max is about 50-60MHz.

See http://www.xcore.com/forum/viewtopic.php?f=6&t=595 for example code.
cicga
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Post by cicga »

thanks Bianco
MaxFlashrom
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Post by MaxFlashrom »

Bianco wrote:You will need to use buffered ports to attain higher speeds.
Max is about 50-60MHz.

See http://www.xcore.com/forum/viewtopic.php?f=6&t=595 for example code.
If one clocks a buffered port with the default reference clock, the chip will clock the data out at 100MHz, Indeed, I have even shown on real hardware that raising the reference clock to 400MHz attempts to clock out data at 400MHz. A pattern of 0xffffffff, 0x00000000 produced a 400/64 = 6.25MHz output, as expected. This is at the extreme end and I would not trust a single-bit time at this speed, but at 100MHz it should be reliable. For inputs it is more complicated as the inputs need to be sampled into the XS1 clock domain. I believe the 400MHz core clock is used for this. An out takes at least 10ns on a 400MHz part. You must be able to fill the port buffers fast enough to prevent underrun.

See https://www.xcore.com/forum/viewtopic.p ... 383&p=9912

Max
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segher
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Post by segher »

cicga wrote:what max speed one can toggle port?
I am using:

while(1){
port<:1;
port<0;
port<:1;
port<0;
port<:1;
port<0;
...
}

period is 80ns = 12.5Mhz. should it be 100Mhz maximum?
Assuming this thread runs at 100MHz you should see toggling with period
50MHz if the compiler managed to make it one instruction per port output.
(And a little bubble at the end of the loop).
It seems the compiler does four instructions per port output instead; look
at the generated assembly (always a good idea!) to check.
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dan
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Post by dan »

The ports can run internally at speeds up to half the core clock frequency, so 250mhz for a -C5 and 200 for a -C4. In this case the ports are running off the sw refclk so the sw refclk must be running at this frequency. Using buffered ports you could certainly toggle a single port pint at this rate.

In theory the output pads would start to degrade the quality of the signal at some point around 100 MHz but you'd need to experiment to see what you can achieve. Of course, probably best not to switch too many ports like this at the same time.

Inputs are more complicated as suggested above, so I shan't go into details unless you're particularly interested.
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