It´s possible that the max speed is 5Mhz on 32bit port or 20Mhz if i divide the code into 4 threads.
On 4/8 bit ports the speed is ok. 16 and 32bit the speed is terrible. Have i made some error, it´s
possible to optimize this better.
Pseudocode:
Code: Select all
while(1) {
old=tmp;
cIn :> tmp; // 32/16/8/4 bit port.
tIn :> trigger; // 8bit port using only higher 4bit value
triggered|=trigger;
if (old==tmp&&!(++cnt||++cnt1!=0xf))
continue;
buff_dat[idx]=tmp; buff_cnt[idx]=cnt; buff[idx++]=cnt1|((trigger>>24)&0xf0);
if(id>=BUFFER_SIZE) idx=0;
if(triggered&&!sampling--) return(id); // sampling done
}
Code: Select all
while(!triggered||sampling--) {
old=tmp;
cIn :> tmp; // 32/16/8/4 bit port.
tIn :> trigger; // 8bit port using only higher 4bit value
triggered|=trigger;
if (old==tmp&&++cnt)
continue;
buff_dat[idx]=tmp; buff_cnt[idx]=cnt; buff_trg[idx++]=trigger;
if(id>=BUFFER_SIZE) idx=0;
}
Pseudocode asm:
Code: Select all
while(!triggered||sampling--) {
add triggered #0
jump if equal #0 label @2
sub sampling #1 -> sampling
jump if equal #0 label break
@2 load port to reg1 -- cIn :> tmp; // 32/16/8/4 bit port.
load port to reg2 -- tIn :> trigger; // 8bit port using only higher 4bit value
math or reg3 <- reg2 - reg3
xor reg10 reg1 -> reg10
jump if not equal to #0 label @1
add reg4 #1
cmp reg4 #0
jump if not equal to continue
xor reg10 reg1 -> reg10
@1: store indirect reg10
store indirect reg4
store indirect reg2
add reg5 #1
xor reg5 reg6 -> reg5
jump if equal #0 continue
xor reg5 reg6 -> reg5
jump continue
}