what is wrong with my .xn?

[porsche]

hi:
I use 2 X1-L1A, node x1 is boot from xmoslink.
and test code is 9 thread. But I get a error message.
what wrong?

------------ error message
Constraint check for "stdcore[0]" (node "x0", core 0):
Stack available: 0x0000fb40, used: 0x000000d0 . OKAY
Threads available: 8, used: 9 . FAILED
Timers available: 10, used: 0 . OKAY
Chanends available: 32, used: 0 . OKAY
Error: Constraints check FAILED for node 0, core 0.
xmake: *** [a100__learn_Debug.xe] Error 1

------------------------ xc code ---------------

Code: Select all

#include <xs1.h>
#include <platform.h>


void test0(void)
{
	while (1)
		;
}

void test1(void)
{
	while (1)
		;
}

void test2(void)
{
	while (1)
		;
}

void test3(void)
{
	while (1)
		;
}

void test4(void)
{
	while (1)
		;
}

void test5(void)
{
	while (1)
		;
}

void test6(void)
{
	while (1)
		;
}

void test7(void)
{
	while (1)
	;
}



void test8(void)
{
	while (1)
	;
}


int main(void)
{

	while (1)
	{
		par
		{
			test0();
			test1();
			test2();
			test3();
			test4();
			test5();
			test6();
			test7();
			test8();
		}
	}

	return(1);

}

----------------------------.xn------------------------
<

Code: Select all

?xml version="1.0" encoding="UTF-8"?>
<Network xmlns="http://www.xmos.com"
xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance"
xsi:schemaLocation="http://www.xmos.com http://www.xmos.com">

	<Declarations>
		<Declaration>core stdcore[2]</Declaration>
	</Declarations>
	
	<Packages><!--The 1st Core, Master, JTAG first in-->
		<!--The 2nd Core, Slave, Jtag out-->
		
		<Package Id="P0" Type="XS1-L1A-LQ64">
			<Nodes>
				<Node Id="x0" InPackageId="0" Oscillator="20MHz"
					SystemFrequency="400MHz" Type="XS1-L1A">
					<Core Number="0" Reference="stdcore[0]">
						<Port></Port>
					</Core>
					<Boot>
						<Source Location="SPI:bootFlash"></Source>
						<Bootee NodeId="x1" Core="0"></Bootee></Boot>
				</Node>
			</Nodes>	
		</Package>
		
		<Package Id="P1" Type="XS1-L1A-LQ64">
			<Nodes>
				<Node Id="x1" InPackageId="0" Oscillator="20MHZ"
					SystemFrequency="400MHZ" Type="XS1-L1A">
					<Core Number="0" Reference="stdcore[1]">
						<Port></Port>
					</Core>
					<Boot>
						<Source Location="XMOSLINK"></Source>
					</Boot>
				</Node>
			</Nodes>
		</Package>
		
	</Packages>
	
	<Links>
	<Link Encoding="2wire" Delays="4,4"><!--If see the LinkEndPoint as pins, the configure pinout.-->
		<LinkEndPoint NodeId="x0" Link="X0LB"></LinkEndPoint>
		<LinkEndPoint NodeId="x1" Link="X0LB"></LinkEndPoint>
	</Link>
	</Links>
	
	<ExternalDevices>
		<Device Name="bootFlash" NodeId="x0" Core="0" Class="SPIFlash" Type="AT25FS010"><!--It seems one attribute is one pin. There are 4 pins.-->
			<Attribute Name="PORT_SPI_MISO" Value="PORT_SPI_MISO"></Attribute>
			<Attribute Name="PORT_SPI_SS" Value="PORT_SPI_SS"></Attribute>
			<Attribute Name="PORT_SPI_CLK" Value="PORT_SPI_CLK"></Attribute>
			<Attribute Name="PORT_SPI_MOSI" Value="PORT_SPI_MOSI"></Attribute>
		</Device>
	</ExternalDevices>
	
	<JTAGChain><!--according to sequence.-->
		<JTAGDevice NodeId="x0" Position="0"></JTAGDevice>
		<JTAGDevice NodeId="x1" Position="1"></JTAGDevice>
	</JTAGChain>

</Network>

[Ross]

The xs1 xcore has eight hardware threads, you are trying to run nine. Hence the error:

Code: Select all

Threads available: 8, used: 9 . FAILED

Cheers

[porsche]

hi Ross:
But 2 XS1-L1A are linked with X0LB. And this system is 2 cores (see .xn), right?
So how to issue a thread to the other core?

by the way, there are 2 questions

(1) one core XS1-L1A links the other XS1-LA with X0LB, can each core boot from its SPI flash? how to write the .xc and .xn? Each core is independent but link each other.

(2) one core XS1-L1A links the other XS1-LA with X0LB, can the other core boot from one SPI flash? how to write the .xc and .xn? This is my design. I think I can assign a thread to any core.

Please clean up my confusion.
Thank you!

[phalt]

Her porsche, please remember to use [ code ] tags to keep things neat and help us understand what you're posting :)

[Bianco]

Hi porsche, there might be nothing wrong with your XN file (i haven't looked at it).
What Ross says is right. You need to tell the tools on which core a thread should run.
If you do not tell it explicitly it will assume core 0. So in your case all threads will be assigned to core 0 and you have 9 threads, 1 too much.

Try this:

Code: Select all

#include <xs1.h>
#include <platform.h>


void test0(void)
{
   while (1)
      ;
}

void test1(void)
{
   while (1)
      ;
}

void test2(void)
{
   while (1)
      ;
}

void test3(void)
{
   while (1)
      ;
}

void test4(void)
{
   while (1)
      ;
}

void test5(void)
{
   while (1)
      ;
}

void test6(void)
{
   while (1)
      ;
}

void test7(void)
{
   while (1)
   ;
}



void test8(void)
{
   while (1)
   ;
}


int main(void)
{

   while (1)
   {
      par
      {
         on stdcore[0] : test0();
         on stdcore[0] : test1();
         on stdcore[0] : test2();
         on stdcore[0] : test3();
         on stdcore[0] : test4();
         on stdcore[0] : test5();
         on stdcore[0] : test6();
         on stdcore[0] : test7();
         on stdcore[1] : test8();
      }
   }

   return(1);

}

This will run the first eight thread on the first core and the last thread on the second core.
Also see the Programming XC on XMOS Devices document.

(1) one core XS1-L1A links the other XS1-LA with X0LB, can each core boot from its SPI flash? how to write the .xc and .xn? Each core is independent but link each other.

(2) one core XS1-L1A links the other XS1-LA with X0LB, can the other core boot from one SPI flash? how to write the .xc and .xn? This is my design. I think I can assign a thread to any core.

Please clean up my confusion.
Thank you!

(1) It is not possible (at least at the moment) to let the tools create two images that can be burned into separate SPI flashes and that talk with eachother and is developed as a single program. This means that it is not possible to let both XMOS devices boot from their own SPI flash and talk with eachother over links (programmed as one program in XC). This said, it is possible to create two different programs by yourself and setting up the links yourself. It will require some Assembly and quite some knowledge of how the links work, so it is not very easy to achieve.

(2) It is possible that one node boots from SPI flash and the second node boots from XMOS Link, the first node will send the firmware over the XMOS Link to the second node (both firmwares are stored in the same SPI flash).

[porsche]

dear Bianco:
do you know some documents / project to reference to (1, all independent cores)?
or an expert of xmos can provide .lib?

Do you have some .xn files which describe a daisy chain of above 3 core (2, link into a network)?
Please help me to understand .xn writing, why not xmos provide a GUI to describe the interwork?

[Bianco]

Ok i tried the XN file in your start post.. There is something wrong with it although i do not know what exactly (other than the missing SPI port declarations).

I'm kinda busy the upcoming days, i'll check back thursday if this problem still isn't solved.

The XK-1A dual board example provides an excellent start for a two node XS1-L configuration.
You only need to add the boot stuff, maybe change a few links. Don't forget to also add the port declarations at the right core when you have a boot flash, this is missing in the XN file in the start post.

The Tools User Guide chapter 8 provides valuable information on how to write XN files.

[porsche]

dear Biano:
Thank you!
(2 link together) I re-do new project and finally work.
But I still know independent case, because my system may be hot-swap

[Bianco]

Hotswap is not achievable with the standard tools and XN files.
Maybe this project can mean something for you:

https://www.xcore.com/projects/runtime- ... ion-xlinks