You might want to read "The XMOS XS1 Architecture". It's a quitechristianj wrote:[...] it seems to use extensively control tokens and I can't seem to find any documentation on this topic.
thorough reference on how the hardware behaves. Most XC constructs
are mapped very directly to that, so it's a valuable resource also if you
never (want to) look a machine code.
That's correct.My understanding is that:
chkct(c_lcd, XS1_CT_END);
checks if there XS1_CT_END token coming on the channel.
"This instruction pauses if the channel does not have a token available to be read."Is this a blocking event ? Will the thread stops until the channel receives something ?
It raises exception #4, ET_ILLEGAL_RESOURCE. That means it saves the PC and SRWhat happens if the token received is not XS1_CT_END ? I believe the thread will raise an exception. But what in reality this do ? will it simply crash the thread ?
register contents in SPC and SSR respectively, sets bits in SR so that interrupts and
events are disabled, and sets PC to the value in the KEP register. The ET register
will contain the type (4 in this case), and the ED register gets data about the
exception (the (local) channel end id, in this case). And a little bit more stuff,
read the doc :-)
So, the code at KEP can do whatever it wants to do to handle the exception,
including trying to recover (it has all the necessary thread state saved, so it
_can_ continue, if it manages to figure out how to deal with the rest of the
world :-) ) OTOH, the standard exception handler goes like:
Code: Select all
# set up the handler
a4: dc13 ldap r11,0x80
a6: 07ff set kep,r11
# the handler itself
80: f003 731a bu 0x238
..
238: 07ed clre
23a: 07ec waiteu