SPI Slave xSoftTip Shifted by 1 Bit

[jmag99]

I am using the spi slave xSoftTip in my project. For some reason, the MSb is shifted right by 1 bit. There is plenty of time after the chip select goes low before the master clocks the data out. Any idea why this could be?

[xsamc]

Hi there,

Which SPI mode is the slave configured to run in, is it possible that the master and slave are not using the same SPI mode?

It's also worth noting the maximum SCLK frequency the slave can support differs between modes, as described here https://github.com/xcore/sc_spi/blob/ma ... erview.rst.

Best regards,
Sam

[stefanharjes]

@jmag99 Are you sure the bit is shifted and not lost? (In my case it was lost). I stoped using the spi tools and wrote my own, which work at 50MHz for hours (on an XC-2). The best way to do so was by checking the exact waves in the simulator and read the XS1-Ports-Specification and maybe have a look at this post: 'How to sync clocked output with its clock?'

Best regards