Prevent compiler from reordering inline assembly

[ers35]

I want to do a partial timed input on multiple buffered ports in XC.
XC does not have partin_timed, so I must use inline assembly.
However, the compiler reorders the inline assembly and the behavior of the code changes completely.

I want to guarantee that the four inline assembly instructions appear in the
same order once compiled:

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u16 t;
u32 sample[1];
while (1)
{
  wordclock when pinseq(0) :> void;
  wordclock when pinseq(1) :> void @ t;
  asm volatile ("setpt res[%0], %1" :: "r"(din[0]), "r"(t + 23));
  asm volatile ("setpt res[%0], %1" :: "r"(dout[0]), "r"(t + 32));
  asm volatile ("outpw res[%0], %1, 24" :: "r"(dout[0]), "r"(sample[0]));
  asm volatile ("inpw %0, res[%1], 24" : "=r"(sample[0]) : "r"(din[0]));
  
  asm volatile ("setpt res[%0], %1" :: "r"(din[0]), "r"(t + 55));
  asm volatile ("setpt res[%0], %1" :: "r"(dout[0]), "r"(t + 64));
  asm volatile ("outpw res[%0], %1, 24" :: "r"(dout[0]), "r"(sample[0]));
  asm volatile ("inpw %0, res[%1], 24" : "=r"(sample[0]) : "r"(din[0]));
}

This is the order once compiled:

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setpt
setpt
outpw
setpt
setpt
inpw
outpw
inpw

This works, but is complicated and will get even more complicated when I add the other
ports.

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asm volatile
(
  "setpt res[%1], %3\n\t"
  "setpt res[%2], %4\n\t"
  "outpw res[%2], %5, 24\n\t"
  "inpw %0, res[%1], 24\n\t"
  // outputs
  :
  // %0
  "=r"(sample[0])
  // inputs
  :
  // %1        %2            %3           %4           %5
  "r"(din[0]), "r"(dout[0]), "r"(t + 23), "r"(t + 32), "r"(sample[0])
);

I could write the whole thing in assembly, but is there any other option?

[segher]

The best solution is to write a single asm, or to write your
whole function as assembler. But you don't want that :-)

To keep the compiler from reordering two asm statements,
make sure there is a dependency between them. For example:

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int junk;
asm("blabla %1,%2" : "=r"(junk) : "r"(a), "r"(b));
asm("blabla %1,%2" : "+r"(junk) : "r"(c), "r"(d));
asm("blabla %1,%2" : : "r"(junk), "r"(e), "r"(f));

[richard]

I want to do a partial timed input on multiple buffered ports in XC.
XC does not have partin_timed, so I must use inline assembly.
However, the compiler reorders the inline assembly and the behavior of the code changes completely.

I want to guarantee that the four inline assembly instructions appear in the
same order once compiled

Marking the asm as volatile should be sufficient - it indicates that the asm has side-effects and the compiler shouldn't motion operations with unmodelled side-effects across each other. I tried to turn you code snippet into a standalone example:

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#include <xs1.h>
#include <stdint.h>

typedef uint16_t u16;
typedef uint32_t u32;

void f(port wordclock, port din[1], port dout[1])
{
  u16 t;
  u32 sample[1];
  while (1)
  {
    wordclock when pinseq(0) :> void;
    wordclock when pinseq(1) :> void @ t;
    asm volatile ("setpt res[%0], %1" :: "r"(din[0]), "r"(t + 23));
    asm volatile ("setpt res[%0], %1" :: "r"(dout[0]), "r"(t + 32));
    asm volatile ("outpw res[%0], %1, 24" :: "r"(dout[0]), "r"(sample[0]));
    asm volatile ("inpw %0, res[%1], 24" : "=r"(sample[0]) : "r"(din[0]));
   
    asm volatile ("setpt res[%0], %1" :: "r"(din[0]), "r"(t + 55));
    asm volatile ("setpt res[%0], %1" :: "r"(dout[0]), "r"(t + 64));
    asm volatile ("outpw res[%0], %1, 24" :: "r"(dout[0]), "r"(sample[0]));
    asm volatile ("inpw %0, res[%1], 24" : "=r"(sample[0]) : "r"(din[0]));
  }
}

However if I compile the above example there is no reordering (as I would expect). What tools version are you using? Are you able to create a simple testcase?

[ers35]

I found the problem. I had

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#define volatile

in a header file. That removed the volatile from the inline assembly, which is why the compiler reordered it.

[segher]

Ha, that would do it :-)