Processors

475 topics

Page 18 of 19
- Jump to page:
Previous
1
…
15
16
17
18
19
Next

Topics

Replies

Views

Last post

XS1-G4 144 example hardware design

by rp181 » Sun Jul 11, 2010 5:13 pm

1 Replies

2255 Views

Last post by Andy
Wed Jul 28, 2010 5:32 pm
Question on MODE pins with 2 L1's

by bearcat » Sun Jul 25, 2010 8:13 pm

4 Replies

2839 Views

Last post by bearcat
Tue Jul 27, 2010 4:42 am
Debugging USB3318 PHY?

by bearcat » Fri Jul 23, 2010 6:34 am

2 Replies

2704 Views

Last post by bearcat
Sat Jul 24, 2010 5:53 am
Clocking Data Out Using an External Clock

by jonathan » Thu Jul 22, 2010 11:43 pm

1 Replies

2020 Views

Last post by Woody
Fri Jul 23, 2010 9:48 am
Layout of Board for XS1-G4

by Jerry » Fri Jul 02, 2010 4:24 pm

4 Replies

2973 Views

Last post by shawn
Sat Jul 10, 2010 8:16 am
XBurn secure flash boot and upgrade flash

by kster59 » Sat Jun 26, 2010 11:16 pm

1 Replies

2363 Views

Last post by m_y
Mon Jun 28, 2010 3:57 pm
Anyone have XMOS L1 assembly issues?

by kster59 » Thu Jun 24, 2010 12:26 am

4 Replies

2705 Views

Last post by kster59
Thu Jun 24, 2010 1:01 am
Ref Clock output on pins ?

by vanjast » Tue Jun 15, 2010 8:57 pm

5 Replies

3444 Views

Last post by vanjast
Fri Jun 18, 2010 8:15 pm
L1 Switch

by jonathan » Fri Jun 11, 2010 7:25 pm

7 Replies

4484 Views

Last post by Woody
Mon Jun 14, 2010 9:49 am
IR LED driver interface suggestions.

by Matt » Mon Mar 29, 2010 6:10 am

5 Replies

3718 Views

Last post by otitov
Sat Jun 12, 2010 11:13 pm
The G4 Switch

by lilltroll » Tue Jun 08, 2010 2:35 pm

1 Replies

1899 Views

Last post by Woody
Tue Jun 08, 2010 3:08 pm
L1 weak pull question

by bearcat » Sat May 29, 2010 8:44 pm

1 Replies

2003 Views

Last post by Woody
Tue Jun 08, 2010 9:52 am
Max power consumption - confusion

by kster59 » Fri May 28, 2010 6:14 pm

1 Replies

2510 Views

Last post by Joe
Fri May 28, 2010 9:09 pm
thermal pad XS1-L1 64 pins

by In_Control001 » Thu May 13, 2010 10:15 am

3 Replies

3303 Views

Last post by Woody
Fri May 14, 2010 8:36 am
Interface slow 5V signals

by skoe » Tue May 11, 2010 2:14 pm

4 Replies

2860 Views

Last post by skoe
Tue May 11, 2010 10:45 pm
Design checklist USB ULPI Port table and XTag2

by Folknology » Wed May 05, 2010 3:23 pm

2 Replies

2638 Views

Last post by Folknology
Sat May 08, 2010 9:51 pm
Issues with Custom L1-64 PCB
1

2

3

4
by kster59 » Mon May 03, 2010 7:39 am
30 Replies

13523 Views

Last post by kster59
Fri May 07, 2010 11:34 pm
FPGA IP directory

by shawn » Tue May 04, 2010 2:56 pm

3 Replies

3515 Views

Last post by paul
Fri May 07, 2010 3:50 pm
Best Way to Do In Field Firmware Updates with XMOS?
1

2

3
by kster59 » Sun Mar 07, 2010 10:11 am
21 Replies

14547 Views

Last post by kster59
Sat May 01, 2010 1:07 am
XS1-L Hardware Design Checklist released by XMOS

by jonathan » Thu Apr 29, 2010 7:51 am

2 Replies

2333 Views

Last post by Folknology
Fri Apr 30, 2010 10:38 am
Maximum 4bit port bandwidth

by Folknology » Wed Apr 28, 2010 11:00 am

2 Replies

2492 Views

Last post by Folknology
Wed Apr 28, 2010 2:22 pm
Initial pin/port configuration/status for L series silicon

by Folknology » Mon Apr 26, 2010 5:30 pm

1 Replies

1923 Views

Last post by Woody
Mon Apr 26, 2010 5:36 pm
opinions regarding proposed implementation etherernet+sdram

by boeserbaer » Wed Apr 21, 2010 3:14 am

5 Replies

4060 Views

Last post by Woody
Mon Apr 26, 2010 2:19 pm
Wishing for a G-link to L-link bridge

by boeserbaer » Tue Apr 20, 2010 2:07 am

4 Replies

3331 Views

Last post by Bianco
Tue Apr 20, 2010 2:19 pm
25Mhz clock for L1 processor bootup and link compatibility

by boeserbaer » Sat Apr 17, 2010 9:27 pm

4 Replies

3125 Views

Last post by Woody
Tue Apr 20, 2010 9:17 am

475 topics

Page 18 of 19
- Jump to page:
Previous
1
…
15
16
17
18
19
Next

Return to Board Index

Who is online

Users browsing this forum: No registered users and 4 guests