eXcited with XMOS but...

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eXcited with XMOS but...

Postby rverma » Thu Apr 20, 2017 11:31 pm

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Postby infiniteimprobability » Fri Apr 21, 2017 10:19 am

Hi Rajiv - welcome to the forum! Let me have a quick go at answering some of your questions.. By the way, you have to consider MIPS, MHz and cores really but I'll try to be simple..

How many MIPS are consumed for each PDM microphone interfacing?

I'll use MHz rather than MIPS because MIPS depends on the number of instructions per clock, which can be 2 but is closer to 1 for random code.
62.5 (1 core) for the PDM front end (up to 8 mics) + 62.5 (1 core) per 4 channels of decimator. You probably need some sore of buffer task 62.5 -( 1 core) Then you need some MIPS to interface to your host. I2S is lightweight 62.5 (1 core) and USB uses more 300 (5 cores)

If we connect 32 MEMS PDM mics (as per the flyer/datasheet), how many MIPS and Cores are left over for doing any DSP algorithm?
Not much - just enough to get samples on to TDM and about 62.5 or possibly 125MHz for DSP if you use an XUF216. See here viewtopic.php?t=5623
However you could use an XUF232 and you would have two whole tiles free - that's a LOT of processing left.

Are all the PDM clocks synchronous such that the PCM samples generated corresponds to audio sampled at the same time (within about 10us of each other)

The PDM clocks are synchronised. Each of the channels are precisely synchronised right through the decimation filters to PCM. This is needed for DoA, beamforming and other algorithms that require subsample precision.

Datasheet for XUF216 says 1000MIPS shared by 16 cores but “Up to 2000MIPS in dual issue mode” – please elaborate on this mode and how realistically can this be achieved?

There are two tiles - each with a 500MHz processor which can support dual issue (2 instructions per clock). Each tile has up to 8 logical cores (call them threads if you like) which share this processing. So peak throughput is 500 * 2 * 2 = 2000MIPS for the XUF216 chip. These are marketing "will not exceed" numbers. More useful info is that a well written FIR (like those used in PDM decimators) can achieve around 2 cycles per tap - see here viewtopic.php?f=26&t=5682&p=28904&hilit=fir+instructions+tap#p28904
Also documentation of libraries for thread/MHz usage by our IP blocks. Every published library will tell you resource usage (it's part of our publishing requirements)

Our minimum requirements are:
16-PDM Mic inputs (Sampling rate will typically be 8 or 16KHz)

OK - not 32 channels? 16 channels is easy and would leave you lots for processing...
TDM output for capturing 16-bit PCM samples from all channels simultaneously (only needed for debug purpose) (USB I/F with Audio Class 2.0 can also be used if possible)

TDM would leave you a lot more resources to play with... see above
DSP algorithm running that require roughly 320MIPS (in addition to any MIPS that maybe consumed to implement the DSP IP itself – if applicable)

OK. Do be aware that we cannot provide a single 320MHz thread. The biggest chunks available are 100MHz, so some splitting of either channels or the processing pipeline will be needed.
At least two serial interfaces – 2xUART or 1xUART + 1xI2C

OK. These could probably share the same thread - what speed is UART (assume full bi directional?) and is I2C master or slave (master is easier and can actually be inlined so doesn't consume any threads).
GPIOs – 10 or more for control & indications.

At least 2 timers

Trivial - you get as many of these as you want in the language.
At least 2 PWM output ports

What speed and bit depth? If for LEDs (500Hz 8b) then these may be able to share a thread with something else.. We don't have a library for these but I can provide some examples for low speed PWM that is resource efficient and can be combined with other tasks.

Optional IOs for running LED/LCD display function (no more functionality than what a microwave display may have)

No problem. I can point you to some button debounce tasks examples..

Based on the above requirements do you believe that the XUF216 will fit the bill?

Just.. Some thread sharing (compiler supports this using combinable tasks) will be needed. I would be about 80% confident on this until I get more detail about your PWM and serial needs.
What would be the MIPS usage – roughly?

Lets assume one thread is a 62.5MHz unit for simplicity (you can split into different size chunks using priority scheduling but let's skip that for now). So we have 16 of those units...
16 mics -> 1 + 2 + 1 +2 = 6 threads
TDM = 1 thread
Buffer task = 1 thread (will be able to do more than just buffer - maybe application logic as this task will not do much in between sample transfer)
Serial + PWM = 1-3 threads (depending on needs). Please let me know answers to Qs above..
That leaves between 16 - ( 6 + 1 + 1 + 1) = 7 and 16 - (6 + 1 + 1 + 3) = 5 threads spare for DSP.
So that gives you between 7 * 62.5 = 437MHz and 5 * 62.5 = 312MHz of processing for your DSP..

Is there possibility to have more than 16-PDM inputs (and satisfy the above requirements)?

Definitely not in an XU216. An XU232 - no problem..
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Postby infiniteimprobability » Thu May 04, 2017 8:47 am

Any more info on your serial port and PWM needs? We can then estimate what resources should be ring fenced for them.

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