Stupid question about XFlash and multi-core devices

[BEBDigitalAudio]

We are about to make our very first XMOS based board (in fact, two boards : one with a XS1-G4, another with a XS1-G2)

Up to now, I have worked only with a XC-2 connected to our hardware to port our applications on the XS1, but now, the real hardware will start.... and needs to boot (and not from the XTAG of course)

I have a question that may appear as stupid, but after looking for hours in all XMOS documentation, it is still not clear for me (maybe a Christmas' turkey side effect ;) )

Do I need to do anything special in XFLASH to generate the file to be loaded in the SPI Flash of our board ?
When I look to XS1 architecture documentation, it is written that core 1, 2 and 3 can only boot from chanend 0. But how do you make core 0 send data to the other cores ?

Taken in another way, my question is simpler : knowing that I do not need to perform in-field upgrades (no need to upgrade the Flash), do I need to do something special to make XFLASH produce a file that contains all the code required for ALL cores ?
(Of course, I have made a XN file for my hardware, and when I connect a XTAG, I am able to debug my real target)

Thanks a lot by advance for your answers and merry Christmas to all

[paul]

I am not quite sure what you are aiming to achieve here. Are you wanting to produce the raw output of the binary data in a flash so that another external programmer can be used or do you want to program the boards through xflash using an xtag?

xflash doesn't require anything special apart from the appropriate XN file to have been used when building the XE. You can use the -o option to output a binary file that is the same as what would be written to the flash when using xflash directly (which could be used with a commercial part programmer). Xflash will generate the appropriate bootloader for the network as defined in you XN file.

Hope that helps,