I'm designing a DAC based on the XU208, which I'd like to have:
- USB Audio Class 2
2 Channels Out
DSD Support up to DSD128 (perhaps DSD256 in the future)
SPDI RX In
Control for the DAC Chip
Volume controls (which control the DAC gain directly)
(Future) I2C control of a LED PWM control for some fancy volume indication
Problem with the current state of things: if I turn on the SPDIF RX in this design I get the compiler error that I'm using 9 cores. From all documents I've seen the resources should be 6 for the whole of USB audio, which would give me 2 cores for my other uses. Can someone take a look at my attached project (which works fine on my current board if I turn SPDIF RX off) and point me to what optimizations can be done? I tried putting my modifications as distributable / combinable tasks to avoid using extra cores, but failed to see any results.
PS: I would hate to migrate to XU216 at this point of the project, so, if adding an extra MCU will help in any way, it would be much preferable.