problem with buffered input

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moh_algoblan
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Joined: Tue Jun 18, 2019 11:39 am

problem with buffered input

Postby moh_algoblan » Mon Jun 24, 2019 9:41 am

I've written this simple code to try buffered input. firstly I've defined a buffered input and using a testbench I've gave it a data. and after inputting all the data I've transferred it into a variable. the problem is the data in that variable is different than the data that I gave in the testbench. it depends on the last bit of the data of the testbench, if it's 1, then x=255 (0b11111111). if it's 0, then x=0b00000000.

Code: Select all

#include <xs1.h>
#include <stdio.h>
#include <print.h>
port temp = XS1_PORT_1A;
in buffered port:8 inP    = XS1_PORT_1B;
clock clk25     = XS1_CLKBLK_1;
int x;



int main(void) {
  configure_clock_rate(clk25, 100, 4);
  configure_in_port(inP, clk25);
  start_clock(clk25);
  par{
      {
          temp <: 1;
          temp <: 0;
          temp <: 1;
          temp <: 0;
          temp <: 1;
          temp <: 0;
          temp <: 1;
          temp <: 1;
      }
      {
          for(int i=0 ; i<8 ; i++) {
            inP :> x;
          }
          printf("%d",x);
      }
  }
  return 0;
}
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mon2
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Joined: Thu Jun 10, 2010 11:43 am

Postby mon2 » Mon Jun 24, 2019 12:40 pm

Hi. Code format tags do not appear to be working. Will raise the quirk.

Here is your code reformatted:
code_reformatted.png
#include <xs1.h>
#include <stdio.h>
#include <print.h>

port temp = XS1_PORT_1A;

in buffered port:8 inP = XS1_PORT_1B;

clock clk25 = XS1_CLKBLK_1;

int x;

int main(void)
{
configure_clock_rate(clk25, 100, 4);
configure_in_port(inP, clk25);
start_clock(clk25);
par
{

{
temp <: 1;
temp <: 0;
temp <: 1;
temp <: 0;
temp <: 1;
temp <: 0;
temp <: 1;
temp <: 1;
}

{ for(int i=0 ; i<8 ; i++)

{ inP :> x; }
printf("%d",x);
}
}
return 0;
}

Please download the PDF from here and review:

https://www.xmos.com/developer/publishe ... and-output

Suggest that the port temp be also be applied as a clocked port but as an OUTPUT port like you have done with the input port inP.
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CousinItt
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Postby CousinItt » Mon Jun 24, 2019 1:00 pm

It looks like you're assuming that the two tasks in your par statement will run in lock step. Since you have no clocking on the output, there's no guarantee as to what your input buffer will get.

Secondly, you're reading your input eight times in a loop. That's not necessary for a buffered input - the input statement will block until the buffer is full, and you only need to read it once.

Try using a buffered output port with the same clock as the receiver, and enabling the clock when both are set up. There's no need to do that in separate tasks.

Also, try using the simulator with waveform tracing.
moh_algoblan
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Posts: 13
Joined: Tue Jun 18, 2019 11:39 am

Postby moh_algoblan » Tue Jun 25, 2019 8:31 am

CousinItt wrote:
Mon Jun 24, 2019 1:00 pm
It looks like you're assuming that the two tasks in your par statement will run in lock step. Since you have no clocking on the output, there's no guarantee as to what your input buffer will get.

Secondly, you're reading your input eight times in a loop. That's not necessary for a buffered input - the input statement will block until the buffer is full, and you only need to read it once.

Try using a buffered output port with the same clock as the receiver, and enabling the clock when both are set up. There's no need to do that in separate tasks.

Also, try using the simulator with waveform tracing.
thank you.
It looks like you're assuming that the two tasks in your par statement will run in lock step. Since you have no clocking on the output, there's no guarantee as to what your input buffer will get.
I tried to synchronize the port temp with the same clock, and nothing changes.
Try using a buffered output port with the same clock as the receiver, and enabling the clock when both are set up. There's no need to do that in separate tasks.
Actually temp here is just a temporary port to use loopback with the input inP for the simulation
Image
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CousinItt
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Postby CousinItt » Tue Jun 25, 2019 12:49 pm

See what mon2 said.

The following code (based on AN10046 and AN10047) works, but out of sync by one bit. It's simpler if you have an external signal on which to synchronise.

See also 6.9 onwards in the XMOS Programming Guide, rev F, and XS1 Ports: use and specification for more information.

Code: Select all

#include <xs1.h>
#include <stdio.h>

in buffered port:8 in_port = XS1_PORT_1A;
out buffered port:8 out_port = XS1_PORT_1B;

clock clk = XS1_CLKBLK_1;

int main(void) {
  unsigned data;
  configure_clock_rate(clk, 100, 8);
  configure_out_port(out_port, clk, 0);
  configure_in_port(in_port, clk);

  out_port <: 0x43;
  start_clock(clk);

  in_port :> data;
  printf("received 0x%x\n", data);

  return 0;
}
moh_algoblan
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Posts: 13
Joined: Tue Jun 18, 2019 11:39 am

Postby moh_algoblan » Wed Jun 26, 2019 8:28 am

CousinItt wrote:
Tue Jun 25, 2019 12:49 pm
See what mon2 said.

The following code (based on AN10046 and AN10047) works, but out of sync by one bit. It's simpler if you have an external signal on which to synchronise.

See also 6.9 onwards in the XMOS Programming Guide, rev F, and XS1 Ports: use and specification for more information.

Code: Select all

#include <xs1.h>
#include <stdio.h>

in buffered port:8 in_port = XS1_PORT_1A;
out buffered port:8 out_port = XS1_PORT_1B;

clock clk = XS1_CLKBLK_1;

int main(void) {
  unsigned data;
  configure_clock_rate(clk, 100, 8);
  configure_out_port(out_port, clk, 0);
  configure_in_port(in_port, clk);

  out_port <: 0x43;
  start_clock(clk);

  in_port :> data;
  printf("received 0x%x\n", data);

  return 0;
}
thank you it worked, but as you said it's out of sync by one bit. is there a way to fix that using the simulator ?
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CousinItt
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Postby CousinItt » Thu Jun 27, 2019 11:29 am

I don't think this is simple for a looped-back buffered port without any additional synchronisation (which is easy to add). There are library functions that allow you to do adjust sampling edges and delays, but I doubt they would make a fundamental difference. You can also enable clock tracing in the simulator, which gives you more information about what's happening in the ports.
moh_algoblan
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Posts: 13
Joined: Tue Jun 18, 2019 11:39 am

Postby moh_algoblan » Mon Jul 01, 2019 8:25 am

CousinItt wrote:
Thu Jun 27, 2019 11:29 am
I don't think this is simple for a looped-back buffered port without any additional synchronisation (which is easy to add). There are library functions that allow you to do adjust sampling edges and delays, but I doubt they would make a fundamental difference. You can also enable clock tracing in the simulator, which gives you more information about what's happening in the ports.
thank you very much, I will try to trace the clock to examine the problem

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