RitchRock wrote:Thanks - I got it working. It's good to know the port's hardware stores the address of the case statement code.
... ususaly, yes.
Timers (non explicitly hardware) are different.
The compiler will emit code that compares the current time with each requested signed-absolute time (assuming current time as zero) and pick the lowest (e.g. already in the past) and only initialise that one (using a hardware timer set aside for that logical core).
Hence, by default, each core is allocated one hardware timer, and XC timers use this in their physical usage - see the assembler output.
This makes sense, as only one event can occur at a time and hence there is no point in setting up a load of hardware timers. It also means that timers will event in order!
The remaining hardware timers are available for assembler or `[[hardware]]' usage and will give you a faster set up and less compiled code... but not faster response - measure assembler output for details.