xrun: Cannot load image, XCore 0 is not enabled

Sub forums for various specialist XMOS applications. e.g. USB audio, motor control and robotics.
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xlordofpainx
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xrun: Cannot load image, XCore 0 is not enabled

Postby xlordofpainx » Wed Aug 29, 2018 1:48 pm

Hey guys. I am still going with my project and i got the the famous XCore 0 not enabled problem.
Here is a part of my schematic

I read other posts but I am not getting any new ideas

1. The JTAG interface to the XCore has been disabled in the OTP security register. -- Not sure how to check

2. The device is being permanently held in reset by the RST_N signal. ---I am using the exact set-up as the Multichannel board + I did check whether it has the same properties as the original - high impedance when off , low impedance when on + 3.3Vts on the Pin

3. No clock is being supplied to the device; or the clock frequency supplied to the device is unsuitable for the selected PLL multiplier. The PLL multiplier is set using the MODE pins and should be configured so that the XCore boots up at or below its maximum frequency. Further details on the MODE pins can be found in the relevant device datasheet. ---- Clock is checked

4. The VDD Core supply is outside of tolerance (see the device datasheet). --- Inside tolerance

5. The VDD PLL supply is outside of tolerance (see the device datasheet) or not present, or has a filter with too high a resistor. This will mean that the PLL is not locked and hence the XCore will be kept in reset.--- Within specs below 1.1

6. The power supplies have not been correctly sequenced. The VDDIO (and OTP_VDDIO if present) supply must be within specification (3.0V-3.6V) before the VDD Core supply is turned on; see the datasheet for details. same secuqnce as original - check schematic

7. The device, especially the ground paddle, has not been correctly soldered to the board. This can either be in the form of not connected solder joints or shorted solder joints to other pins, ground or power.--- I added enough solder paste and used heatgunned it long enough
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xlordofpainx
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Postby xlordofpainx » Wed Aug 29, 2018 1:50 pm

I also spotted that i hadnt grounded the pll GND, SO i did that with a thin wire and checked checked against shorts
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mon2
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Postby mon2 » Wed Aug 29, 2018 2:07 pm

Hi. R33 does not look like the correct value @ 1k. Will check upon reaching the office so this is purely from memory...
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xlordofpainx
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Postby xlordofpainx » Wed Aug 29, 2018 2:11 pm

Yes I switched it for a 4.7K referencing the original design - still No
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mon2
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Postby mon2 » Wed Aug 29, 2018 3:26 pm

Hi. This resistor is required to be 4R7 = 4.7 ohms (about 5 ohms). If you do not have this value, for now, bypass with a solder short direct to 1v0.

See attached reference from XMOS:
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mon2
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Postby mon2 » Wed Aug 29, 2018 3:42 pm

Also, on the Si5351A, did you source the exact part that was defined by XMOS? That is required so that the XMOS CPU has a clock that is running during power up. If you are observing that the clock is not running during power up then you may have the generic blank part that demands the use of an I2C master to program the PLL registers so that the clock outputs are to spec. It is a catch-22 as XMOS is the I2C master so for this reason, you must apply either a fixed clock to clock the XMOS CPU OR apply the pre-programmed (by Silabs) PLL.

The part you need to source is here:
http://www.digikey.com/product-detail/e ... ND/5799560

On this topic, CLK2 is also generating an output clock. Regardless of the value, it is an output but in your design, you have this output shorted to ground. This is not good for the PLL. Consider to lift the leg of this CLK2 pin # 6 on this package so it is floating as you do not appear to be using this clock output in your design.
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mon2
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Postby mon2 » Wed Aug 29, 2018 4:05 pm

On your power supply, the cap (C10) on the CD pin of U6 should be 1nf where as you have 1 uf shown in the schematic. 1nf = 0.001uf / 0.001mf. This may be critical to the power sequencing delays.

Reference:
https://www.justradios.com/uFnFpF.html
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RitchRock
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Postby RitchRock » Wed Aug 29, 2018 5:52 pm

Hi, I do not see the USB jack on the schematics you posted. Are you using the chip with USB audio 2.0? Is 5v on the PSU sourced from USB Vbus or from an external supply?
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mon2
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Postby mon2 » Thu Aug 30, 2018 1:26 am

PLL_AGND (Pin 104) is floating and instead is required to be connected to ground. This can be a show stopper.
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xlordofpainx
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Postby xlordofpainx » Thu Aug 30, 2018 9:00 am

Great answers. Thanks guys. I fixed the cap and the resistor (ohm cuz didnt have 4.7) The oscillator is pre-programmed to output 24 and 49.152 and i have already tested it without the XMOS, but i did ground it because that manual said so, but i will follow your advice now . I also grounded the PLL pin that i had missed(before I saw your comment). Starting tests again I will post results and more puzzles.

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