XTA basic

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shyamkrish8iitm
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Posts: 15
Joined: Mon May 28, 2012 11:20 am

XTA basic

Postby shyamkrish8iitm » Mon Jul 02, 2012 12:45 pm

What is the difference between,
label
endpoint
call
loop and looppath
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kris
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Posts: 84
Joined: Mon Jan 18, 2010 2:52 pm

Postby kris » Mon Jul 02, 2012 3:08 pm

Hi,

Endpoints are the points that can be timed between. What can be used as an endpoint depends on what level you are working at. If you are working from XC then these roughly correspond to I/O instructions. If you are working at the assembly level, then any instruction/asm label can be used as a start/endpoint.

Labels are used as a portable means to reference some part of your code, and can be used for tuning the timing between start/end point. E.g. setting loop counts and excluding code paths.

Briefly, call points are used when you want to specialise the timing of a particular part of a route. E.g. A function contains a loop and is called from multiple places. Using call points will allow you to state that when called from point 'a', it will iterate 10 times, but when called from point 'b' it will iterate 20 times (probably best to see the manual for more details/examples).

A iteration count can set set on a loop using the 'set loop' command. However, if the loop contains a conditional, then a particular path through the loop can be given an iteration count, and this is achieved using the 'set looppath' command.

For more details on all these terms and examples of how they can be used, see the Timing Analyzer Manual:

https://www.xmos.com/node/15579?support=1

Hope this helps,
Cheers,
Kris.
shyamkrish8iitm
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Posts: 15
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Postby shyamkrish8iitm » Mon Jul 02, 2012 7:29 pm

Code: Select all

{
.
.
.
#pragma xta endpoint "start"
.
.
. 
{
   #pragma xta label "one"
 }
.
.
.
}
#pragma xta endpoint "end"
for the above code snippet, if I say

Code: Select all

#pragma xta command "exclude one" 
#pragma xta command "analyze endpoints start end"
does it mean that, while analyzing between start and end, it will exclude that label "one" loop?
shyamkrish8iitm
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Postby shyamkrish8iitm » Mon Jul 02, 2012 8:39 pm

label to specify particular code section within that loop.
Endpoints are usually just above any port operation or function call.
I hope I am right
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kris
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Postby kris » Tue Jul 03, 2012 9:54 am

Yes, that's right. For example:

Code: Select all

#pragma xta endpoint "start"
p <: 1;
. 
if (condition) {
   #pragma xta label "one"
}
.
#pragma xta endpoint "end"
p <: 0;
If the following xta commands are executed on the above code, the effect will be to give the worst case time from the port output labeled 'start' to the port output labelled 'end', excluding any paths of execution that pass through the block containing the label 'one', (i.e. those in which 'condition' evaluated to true).

Code: Select all

add exclusion "one" 
analyze endpoints "start" "end"
Cheers,
Kris.
shyamkrish8iitm
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Posts: 15
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Postby shyamkrish8iitm » Tue Jul 03, 2012 12:05 pm

Thank you very much sir, I am improving. Another doubt is, say I want to analyze a function.

Code: Select all

int function(int a){
.
.
printf();
printstrln();
.
.
}
In the above code, I don't want the printf() statements to be analyzed. Using pragma how to exclude only that part of the code? Right now I am commenting out that code while running XTA.

thanks :)
shyamkrish8iitm
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Posts: 15
Joined: Mon May 28, 2012 11:20 am

Postby shyamkrish8iitm » Tue Jul 03, 2012 12:33 pm

Yet another doubt is, I can very well analyze my timing constraints using XMOS timer variable. I can't exclude labels as I do. But what's the significance and advantages of this tool when compared to analyze using timers?
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kris
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Postby kris » Thu Jul 05, 2012 11:42 am

In the function as stated, if an exclusion was placed before the print, then the whole function would be excluded as it works on paths of execution, not particular statements. However, if your code was as follows:

Code: Select all

int function(int a){
.
    if (condition) {
        #pragma xta label "a"
        printf();
    }
.
}
Then the code in the conditional block can be excluded using the label "a".

In terms of advantages that this tool gives, the main one is that this analysis is done statically (at compile time), thus can verify that timing is met for all paths. However, using dynamic (run time) methods, the timing can only be verified for the path of execution taken, thus you would have to ensure that your test cases cover all paths.
shyamkrish8iitm
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Posts: 15
Joined: Mon May 28, 2012 11:20 am

Postby shyamkrish8iitm » Fri Jul 06, 2012 10:12 am

In XTA document it's given that we can't analyze par{}. But I have to analyze so how to go about?

Code: Select all

	par
	{
		for(i=0;i<BOUND;i++){
#pragma xta label "loop1"
			f(c1,i);
		}
{
#pragma xta label "loop2"
		for(k=0;k<BOUND;k++){
#pragma xta label "innerloop2"
				ch:>Data;
				x[Data] = x[Data] + 1;
			}}
	}
#pragma xta command "analyze loop loop2"
#pragma xta label "set loop - innerloop2 300"

The above pragma's are giving error saying, no valid path found or loop2 is not a valid loop point etc...
All I want is to analyze both for loops and set the maximum as my timing constraint.
Can you please provide me a solution?
Thanks
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kris
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Postby kris » Thu Jul 12, 2012 11:27 am

For example, with the following code:

Code: Select all

int f1() { return 0; }
int f2() { return 0; }

int main() {
    int i, j;

    par {
        for (i = 0; i < 10; i++) {
            #pragma xta label "loop1"
            f1();
        }
        for (j = 0; j < 10; j++) {
            #pragma xta label "loop2"
            f2();
        }
    }
    return 0;
}
you can analyse the 2 loops and set requirements using the following xta commands:

analyse loop loop1
set required - 1000 ns
analyse loop loop2
set required - 1000 ns
print summary

Which will display something along the lines of:

Code: Select all

Route(0) loop: loop1
    Pass, Num Paths: 1, Slack: 880.0 ns, Required: 1.0 us, Worst: 120.0 ns, Min Core Frequency: 48 MHz

Route(1) loop: loop2
    Pass, Num Paths: 1, Slack: 860.0 ns, Required: 1.0 us, Worst: 140.0 ns, Min Core Frequency: 56 MHz

Pass, Min Core Frequency: 56 MHz
Note: For each of the loops, this analyses a single iteration of the loop.

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