DDR memory modules to xmos

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Berni
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DDR memory modules to xmos

Postby Berni » Sat Jul 10, 2010 8:46 pm

I hit a project where a lot of ram is needed and i was thinking about using standard DDR ram modules used in PCs as it seams like a cheep path to go. I seen SDRAM code for xmos and DDR memory is basically built from SDRAM. I really hate the interface DRAM has with all the refreshing and so on but its the only kind of memory thats cheep at such sizes.

One thing i don't really like is the huge 64bit data bus on the thing, but i guess i can widdle it down to 32 or 16 bit using some sort of logic latches.

Its intended use is buffering very large amounts of high quality audio. So a extremely high speed is not necessary but of course its preferred to have it run as fast as possible. So what are your guys toghts about it? Is it a reasonable way to go or is it a ridiculous idea doomed to fail?
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snowman
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Postby snowman » Sat Jul 10, 2010 11:56 pm

XCore cannot handle double-edged clocking
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segher
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Postby segher » Sun Jul 11, 2010 1:36 am

You don't have to use DIMMs, you can use single chips instead.

You could also look into using PSRAM (DRAM with an SRAM interface). Those are quite cheap as well.
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Berni
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Postby Berni » Sun Jul 11, 2010 7:36 am

I know xcore cant double clock but that could be solved with some logic no problem. I toght of using DDR as it is very cheep in large sizes. The target was 128MB of ram but DDR makes much larger sizes no problem. I know im stuck with the nasty SDRAM as its the cheapest kind so why not use DDR DIMMs anyway.

I did decide to use PSRAM for graphics and other general purpose memory as it comes quite cheep up to about 16MB
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shawn
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Postby shawn » Sun Jul 11, 2010 2:06 pm

Yes! , you could custom a memory controller.
You may even take advantage of the 64bit data bus
and perhaps setup a nice inexpensive VLIW, CSP
compliant FastXLink interconnect, that would be so cool. 8-)
Could add ECC and multi-Xlink switch to agragate the controller.
What do you think? You could even take advatage of cheap LP DDR3
A good memory controller, characterized burnt into small Anti-Fuse FPGA.
Would protect "your!" IP and perhaps turnkey some value. ; )
DDR memory modules would be big for XE community.
So many projects, so many robotic devices, so many possibilities.
Project of the month, for sure.
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Berni
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Postby Berni » Sun Jul 11, 2010 5:08 pm

Actually we had a crazy FPGA idea along the way too. But i'm not really that big of a FPGA fan and never used one. But i could see a simple DDR controller wouldn't take a lot of logic. Altho im not after super high performance in this case so im planning on just some logic to make the I/O on it more manageable.
It shouldn't take too much logic like some T flip flop to turn a normal clock in to double clocking and some latches to shrink the huge 64bit bus in to 32bit or 16bit.

Still a FPGA xlink DDR3 controller sounds like one sweet piece of silicon, but because the lack of my FPGA experience it seams it will have to wait.
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shawn
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Postby shawn » Mon Jul 12, 2010 6:45 am

I'm sure logic circuits will work just fine. DDR memory modules regardless of my XMAS memory wish list, shall
be resource for hard core Unix C++ STL gang with there crafty file format, from there the list is many.....
The FPGA market is a nasty business, there are more hooks and golden screw drivers that both ATT and
IBM both winced. That is that they both sold there FPGA divisions away. I often talk of FPGA's empathetically, but thats because my approach is unque. In reality I am more sympathetic. The good news on FPGA's and the same applies to XMOS, is reprogrammability, and that really means no end of life if the architecture is right. Then again if you burn an anti-fuse well you can't reprogram it, same gos for the XMOS's OTP. But that has its important benefits too. I look forward to seeing this progress, I am sure I'll learn something new or old about memory architecture. I think your choice to avoid FPGA's is wise unless you where comfortable with that technology. It would slow you down, I am sure you could program it easy enough, but the process of characterization, ahhhh, how many hardware errors do you have to instantiate to prove the circuit??????????? lots. :|
kuba
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Postby kuba » Mon Aug 29, 2011 5:42 pm

snowman wrote:XCore cannot handle double-edged clocking
I don't recall the DDR protocols offhand, but you know -- the RAM is so cheap you can waste some of its capacity. Wasting half of it may be a simple workaround.

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