Boot Procedure

Technical discussions around xCORE processors (e.g. xcore-200 & xcore.ai).
gilbertmlliu
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Post by gilbertmlliu »

FYI, I have removed some unused pins, which referring to the app project I attached earlier.
In addition, you may that I am using a 20MHz oscillator in the schematic, but I changed to a 10MHz one at the moment.
In fact, I would like to see the differences between these 2 oscillators (10MHz and 20MHz), but I think the differences in the setting is the Mode[1:0] = 00 for 10MHz, then 11 for 20MHz.
Please see the attachment for the schematic and advice.
Thank you.
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segher
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Post by segher »

You could try reducing R22 in value, as it is it is one big
race condition. But it is hard to tell without anything more
to go on than "it doesn't work" :-)
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sethu_jangala
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Post by sethu_jangala »

gilbertmlliu wrote:FYI, I have removed some unused pins, which referring to the app project I attached earlier.
In addition, you may that I am using a 20MHz oscillator in the schematic, but I changed to a 10MHz one at the moment.
In fact, I would like to see the differences between these 2 oscillators (10MHz and 20MHz), but I think the differences in the setting is the Mode[1:0] = 00 for 10MHz, then 11 for 20MHz.
Please see the attachment for the schematic and advice.
Thank you.
Also you need to make sure you reflect the same changes in the XN file with regards to the Oscillator.

Sethu.
gilbertmlliu
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Post by gilbertmlliu »

Hi Segher,

Thanks for the suggestion.
Unfortunately, nothing change.
I did measure that pin during my debug mode and after xflash into the flash.
The mode 2 and 3 are high, as well as the TRST_N pin.


Hi Sethu,

Thanks for the reminder.
I have tested with the correct XN file.
Problem is still exist.
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sethu_jangala
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Post by sethu_jangala »

Hi Gilbert,

I had our Hardware Engineer have a quick look at the schematic and these are the following noted:

1. Mode 4 pin should be pulled low.
2. Mode 2 and Mode 3 should be connected to Pin 3 of DEBUG IN (P3)
3. TRST_N should be connected to Reset directly.

Sethu.
gilbertmlliu
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Post by gilbertmlliu »

Hi Sethu,

With your new comment, there are 3 items.
I am not quite clear on the item 2, Mode 2 and Mode 3 should be connected to Pin 3 of DEBUG IN (P3), what pin(s) should I connected with mode 2 and 3 pins?
what is the reason for that?
Thanks, I will perform the change and test it out.
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sethu_jangala
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Post by sethu_jangala »

I am not quite clear on the item 2, Mode 2 and Mode 3 should be connected to Pin 3 of DEBUG IN (P3), what pin(s) should I connected with mode 2 and 3 pins?
what is the reason for that?
The Mode2 and Mode 3 pins should be connected to the Pin 3 of 10x2 Male header(P3) of your schematic. The reason you need to connect these is for mode selection(either SPI boot or fro JTAG boot).

Sethu.
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segher
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Post by segher »

Pin 3 of the XSYS connector used to be called "TRST#".
It was used for two things: 1) reset the JTAG controller,
via the CPU pin of the same name; and 2) when booting
"from JTAG", to set the MODE pins, before bringing RST#
high.

Some newer chips do not have a TRST# pin. It's not needed
because the in-band JTAG reset sequence works just fine.
The XSYS pin was renamed to MSEL (for "mode select").
You do not need to connect the chip TRST# to the XSYS,
which simplifies the circuitry quite a bit. It also makes it
much easier to ensure the MODE pins are at a stable value
when you bring RST# high (or two cycles later really).
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segher
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Post by segher »

Good example schematics are slicekit (first page top middle).
Docs for XSYS are in the XTAG2 manual.
gilbertmlliu
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Post by gilbertmlliu »

Hi Segher,

Thank you for your kindly explanation.
Greatly appreciate.

To all the support team,

My board booted up finally and my program is running.
Thanks a lot!
Greatly appreciate all the efforts!

Best Regards,
Gilbert