Design checklist USB ULPI Port table and XTag2

Technical discussions around xCORE processors (e.g. General Purpose (L/G), xCORE-USB, xCORE-Analog, xCORE-XA).
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Folknology
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Design checklist USB ULPI Port table and XTag2

Postby Folknology » Wed May 05, 2010 3:23 pm

Why does the pin usage for the XTag2 using an L1-64 and USB differ so much from the USB ULPI Port Table (UUPT) in the Hardware Design checklist.

Clear differences:
1) XTag2 uses LLINK A in 2 pin mode - UUPT say's "no", port unavailable.
Does this mean that the XTag2 unloads the ULPI to use the LLINKs, or is it that the anticipated usage of the LLINKS is confined to pre ULPI loading, couldn't the LLINKpins interfere with its operation? Or is there some other mystery explanation that we could be furnished with.
2) XTAG2 use Xn24,25,26 for urst,tx,rx - UUPT says Xn26 is not available?

Would love some insight, and would love to be able to use these extra pins given how many ULPI already steals from us, thoughts..

Regards
Al
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larry
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Postby larry » Fri May 07, 2010 3:08 pm

Thanks for pointing this out

1) Links are unaffected by ULPI operation and are free to be used. The next version of the design checklist (existing version of which is at http://www.xmos.com/published/xs1lcheck) will mention this.

2) Xn26 is unavailable in ULPI mode. Its' use by the XTAG2 board is an unsupported feature.
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Folknology
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Postby Folknology » Sat May 08, 2010 9:51 pm

Thanks for the clarification Larry.

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