Hi people. I wanna bring this thread up again. Thanks a lot for this really awesome post explaining the details and providing code and configuration files!
I wanna use the XEF232-1024-FB374 because it has 4 Tiles, but I only have a xCORE-200 explorerKIT to do development. It would be ideal to be able to test my application on HW without doing a full PCB design. I have a few questions/comments:
1. Discussion on which Link to use
- Link4/Link E does NOT seem to interfere with either RGMII or USB on Tile1. I am looking at the portmap now and none of the 4 Link E outputs or the 4 inputs are mapped to the same pin as the RGMII ports. Could you please share some screenshots or something of how you made that conclusion?
- As far as I understand, if a port and a xCONNECT link map to the same physical pin, then you can only use one of them. I don't understand what is meant by a port being used internally while an link is enabled
2. How can 2x explorerKIT emulate a single 4-TIle XEF232
- How many wires of Link E connecting the two boards should be used to be more similar to the XEF232 scenario? I.e. how many wires are used in the internal Links of XEF232 connection the two switches? I would guess its all 5?
3. Understanding the booting
- xCORE 1 seems to boot from "bootFlash" while xCORE 2 boots from "XMOSLINK".
- So, upon a power cycle, xCORE1 will access its internal QSPI, load the program into SRAM and start executing
- What about xCORE2? Will it wait for some information over the link? Must I make a program running on one of the Tiles of xCORE1 that opens up a channel to xCORE2 and sends some data? Any references for the booting of Xcores?
- I assume that the actual program is stored in the QSPI flash of both xCOREs, so after xCORE2 has booted over the Link, it will start loading the program from its local QSPI flash
Thanks for any pointers
Connecting Two xCORE-200 explorerKIT Using xTAG and xCONNECT
Technical discussions related to any XMOS development kit or reference design. Eg XK-1A, sliceKIT, etc.
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