Idea aboutrun Asterisk VOIP with XMOS

Technical discussions related to any XMOS development kit or reference design. Eg XK-1A, sliceKIT, etc.
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Andy
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Post by Andy »

PJSIP is another C stack I've looked at that is suited for embedded.

It's true that if you're going to connect this to a PC, you're probably best treating the XCore as a USB audio interface with FXS/FXO port and write a driver for it in Asterisk.

Instead of USB, you could stick Ethernet on it and treat it as standalone Analogue Telephone Adapter.


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nassim
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Post by nassim »

Hi all

hi Andy, this is a great idea and very practical to do it for first step.

my final idea is this picture when i use FPGA and build embedded SOC (powerpc or other) to run an embedded Linux and also Asterisk for Voip application and configure to use XMOS as decoder Audio (SIP/G72x/other) and connect to other device (telephone...) throat FXS/FXO.

And also made PCB for this project when he include fpga and XMOS.

Image

thanks all for your participation and i wait for other member for collaboration and discussion for other Idea and it's opensource.

thanks all
Last edited by nassim on Thu Feb 23, 2012 12:51 pm, edited 1 time in total.
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skoe
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Post by skoe »

Yes, pjsip is also a good choice, but it's very tight integrated with pjmedia. I'm not sure if it can be used stand-alone easily. However, it's worth a try, the API is very easy to use and also well documented.

Edit: Oh, wait. Yes, You really need something like pjmedia for the transcoding. G.711 should be enough for the beginning. The jitter buffer fits into the XMOS RAM. The AEC of pjmedia (speex) is too expensive, it needs several 100 MIPS, but the echo suppressor is simple and fast and okay for most peoples taste.

A good idea to build it like a SIP <=> POTS terminal adapter.
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Andy
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Post by Andy »

Speex should be possible in a 50 MIPS thread. Are you thinking of something else? AEC is probably a separate library.

See: http://www.microchip.com/stellent/idcpl ... e=en023610
Narrowband Mode:
● MIPS : Encoder 17.85
Decoder 2.11
● Program Flash: 24KB approx.
● Data RAM: 7.6 KB approx
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skoe
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Post by skoe »

I meant the AEC implementation of the speex library but not the speex codec itself. This AEC is used by pjmedia, it can be used for any codec, it's not bound to the speex codec.

I overestimated the processing power a little bit. This AEC needs roughly 240 MIPS at 8 kHz on an ARM926ejs (200 ms tail length). It has some ARM DSP instruction set optimizations already. Well, if one does the same optimizations for the XMOS instn set, it could work even on a single core XMOS. Without specific optimizations it _may_ be tight and possibly could occupy a core for itself.

The speex codec is nice, but unfortunately not as widely used in VoIP-world as the ill (patented) G.729 or recently G.719. That's why I think G.711a/u for narrow band and G.722 for wide band should be on the wishlist, at least one of these two is supported by every gateway and SIP phone I know. Speex would be nice to have for small bandwith links (<= 64 kbps)

The link you posted contains the number of MIPS for this special implementation which makes use of a DSP instruction set. The reference implementation is slower, dunno how much exactly. Should be easy to compile it for XMOS and make a test (encode/decode from RAM to RAM).

All in all a nice idea. If you can make it all in a single core XMOS, it could be a very competitive solution.

Edit; arrrrrg! Only 120 MIPS, for one bi-directional channel you need one AEC only. Sorry. Under the assumption than an XMOS has more MIPS than an ARM with slow SDRAM the AEC could fit in one thread. I was too pessimistic :)
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nassim
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Post by nassim »

hi all, just update

the first step in complete =>> porting latest version of linux kernel-2.6.39 to our processor architectural Openrisc1200-V3

so the second step in connect XC-2 kit to FPGA and writing Xlink to wishbone Bus (verilog) and implement a simple DSP on xmos in XC languages for coding Audio (video) :D

so that's all ;)
Last edited by nassim on Thu Feb 23, 2012 12:48 pm, edited 1 time in total.
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rubenc
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Post by rubenc »

nassim wrote: so the second step in connect XC-2 kit to FPGA and writing Xlink to wishbone Bus (verilog)
How is your Xlink implementation going? I am looking for this in VHDL I am not sure if someone else has it allready. or maybe I can help porting your velilog:-)
I like the combinatio FPGA-XMOS
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nassim
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Post by nassim »

hi

unfortunately not yet, because my XC2 is destroyed :cry: , i just test audio with embedded codec AC97 and stream audio with VLC.

if you have idea, you are welcome :D