Hello,
My XK-AUDIO-216-MC-AB has been flashed succesfully with the AN00202_gige_avb_i2s_demo
AVB signal has been succesfully reported within my network, streams aknowledged by the AVDECC controllers, everything seems to be fine.
However I am not able to understand from the schematics the i2s I/O pins that I should use
Also I cannot understand how I am going to select the master/slave mode that this connection will be subjected to.
Pls forgive my ignorance and help me if you have some time.
Many thanks in advance!
i2s pin topology for AN00202_gige_avb_i2s_demo
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stamatiski
- Junior Member
- Posts: 5
- Joined: Mon Feb 03, 2020 12:58 pm
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mon2
- XCore Legend
- Posts: 1913
- Joined: Thu Jun 10, 2010 11:43 am
Hi. Not an audio developer but have you reviewed the attached appnote for this example code? See page 7 which offers the port pin assignment. Best recommendation is to use the same XMOS CPU and apply the same port pins as shown in the reference schematic to ensure a working product.
Using the XCORE-200 Multichannel Audio Platform 2v0 Hardware Manual, review the schematics and specifically the ADC and DAC components. Then back trace the interface pins to see where they mate with the XMOS CPU.
From a quick glance,
the DAC port pins land onto the XMOS xDAC_SD1..xDACSD4 pins.
the DAC port pins of DAC_SD5..DAC_SD8 are being shared through multiplexer U22 and land onto XMOS xSDIO1..xSDIO3 and selected through the DSD_MODE signal.
For the ADC,
the ADC port pins of ADC_SD1..ADC_SD4 are being mapped onto the XMOS iADC_SD1..iADC_SD4 which is also mated to the above U22 multiplexer.
reference page 18 of the XCORE-200 Multichannel Audio Platform 2v0 Hardware Manual.
Using the XCORE-200 Multichannel Audio Platform 2v0 Hardware Manual, review the schematics and specifically the ADC and DAC components. Then back trace the interface pins to see where they mate with the XMOS CPU.
From a quick glance,
the DAC port pins land onto the XMOS xDAC_SD1..xDACSD4 pins.
the DAC port pins of DAC_SD5..DAC_SD8 are being shared through multiplexer U22 and land onto XMOS xSDIO1..xSDIO3 and selected through the DSD_MODE signal.
For the ADC,
the ADC port pins of ADC_SD1..ADC_SD4 are being mapped onto the XMOS iADC_SD1..iADC_SD4 which is also mated to the above U22 multiplexer.
reference page 18 of the XCORE-200 Multichannel Audio Platform 2v0 Hardware Manual.
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stamatiski
- Junior Member
- Posts: 5
- Joined: Mon Feb 03, 2020 12:58 pm
Thank you mon2,
Following these I will try to figure out the topology.
The truth is that I am not familiar with technical guidance,
I am afraid that with my limited knowledge I need instructions as those which someone would have to give to a young child, e.g. in this case to point out in a diagram the excact pins :)
Again, Thank you so much!
Following these I will try to figure out the topology.
The truth is that I am not familiar with technical guidance,
I am afraid that with my limited knowledge I need instructions as those which someone would have to give to a young child, e.g. in this case to point out in a diagram the excact pins :)
Again, Thank you so much!