JTAG connection to StartKit
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So if you pull down the MSEL on the TP1 edge connector you should be able to boot from the JTAG on the same TP1 and use the device as if it was XS1-U16A, right? Tile 1 might be though programmed to be a "secure island" so the OTP should be first reprogrammed.
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That's the idea, yes. Sort of.
Tile #0 (the debugger tile) still boots from OTP. I haven't
examined that code yet; it might for example just sleep if
MSEL is pulled, just as the bootrom does.
It seems to run the same boot protocol as XTAG2, so you
can already run whatever you want via that (you lose the
integrated debugger that way, of course).
I'm currently making my tools work with XTAG2 (running
a custom firmware; this makes it a generic JTAG adapter),
which then should be easy to port to startkit. That should
make Lyle happy :-). Still missing some essential hardware
to get startkit to work, heh.
Oh fwiw: 1I is #TRST/MSEL (not connected), 1C/1D are
DIG0/DIG1 (not used in the "XTAG" firmware).
Tile #0 (the debugger tile) still boots from OTP. I haven't
examined that code yet; it might for example just sleep if
MSEL is pulled, just as the bootrom does.
It seems to run the same boot protocol as XTAG2, so you
can already run whatever you want via that (you lose the
integrated debugger that way, of course).
I'm currently making my tools work with XTAG2 (running
a custom firmware; this makes it a generic JTAG adapter),
which then should be easy to port to startkit. That should
make Lyle happy :-). Still missing some essential hardware
to get startkit to work, heh.
Oh fwiw: 1I is #TRST/MSEL (not connected), 1C/1D are
DIG0/DIG1 (not used in the "XTAG" firmware).
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Oh I forgot to mention: you cannot reprogram OTP (that's
what the "O" stands for). Well this isn't _exactly_ true,
but...
what the "O" stands for). Well this isn't _exactly_ true,
but...
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OTP = One Time Programmable, yes.
The J5 (I think, 1C/1D = DIG0/DIG1) header has two SPI pins (data read=MOSI and clock. X0D10 and X0D11, though the OTP boot ROM can change the ports - is the debugger tile btw. also booting from SPI flash?), what will happen if you pull down the data pin externally, is the OTP boot interrupted? No because the tile has been configured for secure booting and it will always boot from OTP only, or actually from SPI flash as the debugger can't fit into the 8kb OTP ROM, but the code in flash (at which location?) is AES Encrypted, isn't it? Can we get the key to replace the debugger code with something else (like USB audio code)?
The J5 (I think, 1C/1D = DIG0/DIG1) header has two SPI pins (data read=MOSI and clock. X0D10 and X0D11, though the OTP boot ROM can change the ports - is the debugger tile btw. also booting from SPI flash?), what will happen if you pull down the data pin externally, is the OTP boot interrupted? No because the tile has been configured for secure booting and it will always boot from OTP only, or actually from SPI flash as the debugger can't fit into the 8kb OTP ROM, but the code in flash (at which location?) is AES Encrypted, isn't it? Can we get the key to replace the debugger code with something else (like USB audio code)?
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The debugger may or may not fit in 8KB, but it contains enough space to get the USB going.
Then the tools can upload the actual firmware through USB. This way you always have the latest firmware in your debugger :-). There is no flash chip on the XTAG2.
One could try this: https://github.com/xcore/proj_xtag2/tre ... dyanmic_xe
Then the tools can upload the actual firmware through USB. This way you always have the latest firmware in your debugger :-). There is no flash chip on the XTAG2.
One could try this: https://github.com/xcore/proj_xtag2/tre ... dyanmic_xe
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The debug tile boots from OTP. It cannot boot from the
SPI flash, it isn't connected to it. Besides, the check for
booting from OTP is before the checks for other boot modes.
Oh, and DIGn use two of the pins often used for SPI boot,
but you need the other two as well (well at least the other
data pin), if you want to get anywhere.
Secure boot is OTP boot _and_ have the sswitch isolated,
and JTAG access (to that core) disabled, and some more
things. The code in OTP will then read some firmware
from elsewhere, possibly encrypted, but that's a totally
software affair, infinitely configurable.
I expect the startkit OTP code is much like the XTAG2 OTP
code; as Bianco says, just a simple USB bootloader, and
first some minimal config. The actual debugger code is
uploaded by the tools. This is not encrypted or locked down
in any way as far as I see, so I don't expect the OTP code
is either.
SPI flash, it isn't connected to it. Besides, the check for
booting from OTP is before the checks for other boot modes.
Oh, and DIGn use two of the pins often used for SPI boot,
but you need the other two as well (well at least the other
data pin), if you want to get anywhere.
Secure boot is OTP boot _and_ have the sswitch isolated,
and JTAG access (to that core) disabled, and some more
things. The code in OTP will then read some firmware
from elsewhere, possibly encrypted, but that's a totally
software affair, infinitely configurable.
I expect the startkit OTP code is much like the XTAG2 OTP
code; as Bianco says, just a simple USB bootloader, and
first some minimal config. The actual debugger code is
uploaded by the tools. This is not encrypted or locked down
in any way as far as I see, so I don't expect the OTP code
is either.
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Ok, so it boots from USB and we should be able to use the same dynamic loading working with startKIT as it does with XTAG2 if we want to use debugger tile for anything else than debugging, right? But then can the software we load from USB to enable communications between the tiles (xCONNECT switch) again? And even enable JTAG? The debug tile has only six 1-bit ports connected to outside (1A=CLK on J6, 1B=nRST on J6, 1C=DI0 on J5 and 1D=DI1 on J5, 1E=TDI on TP1, 1F=TMS on TP1 - there are more pins on TP1, 1L=TDO and 1G=TCK, those overlap with JTAG pins). That's for sure enough for USB 2.0 Audio reference design. Anyway, the question is does the USB dynamic loading work with startKIT like with XTAG2 really.
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#0 boots from OTP, and does who-knows-what. #1 bootsmhelin wrote:Ok, so it boots from USB and we should be able to use the same dynamic loading working with startKIT as it does with XTAG2 if we want to use debugger tile for anything else than debugging, right?
from SPI. #0 then does the load-from-USB thing. The
thing normally loaded to it (by xgdb) is an XTAG2-style
debugger. It drives all those 1-bit ports to its own JTAG
pins; this works just fine as the JTAG stuff doesn't interfere
with the CPU running (except one particular pin -- think
about it :-) )
It already is connected! The analogue tile is connected toBut then can the software we load from USB to enable communications between the tiles (xCONNECT switch) again?
#0 only. #1 can also reach it, so the link(s) between the
two digital tiles (and routing) must be set up already.
It's not disabled afaics.And even enable JTAG?
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Thank you for nudge - this works:) With modified run_dynamic_xe application I'm able to run custom code on tile[0].Bianco wrote:The debugger may or may not fit in 8KB, but it contains enough space to get the USB going.
Then the tools can upload the actual firmware through USB. This way you always have the latest firmware in your debugger :-). There is no flash chip on the XTAG2.
One could try this: https://github.com/xcore/proj_xtag2/tre ... dyanmic_xe
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Congrats :-). Now make it do something useful!