This is the oscillator that the dev board for the XHRA-2HPA uses, but it seems like the frequencies are exactly twice what they need to be in order to drive MCLK and a typical DAC. Can damage be done to the chip by driving it at the default frequencies (~49MHz)?
The ADC I'm working with can use an MCLK up to 49.152MHz so this part would be useful. I suspect with this PLL you will have an analog switch to select between 48kHz and 44.1kHz families. If you absolutely need 1/2 those rates, and you have plenty of clock blocks on the XMOS chip, I suspect you could take the high frequency clock and divide it by 2 on your XMOS chip and output that as the board MCLK.