about: spi speed (lib_spi_3.0.2rc1)

Technical questions regarding the xTIMEcomposer, xSOFTip Explorer and Programming with XMOS.
User avatar
Active Member
Posts: 35
Joined: Wed Jan 09, 2019 10:57 am

about: spi speed (lib_spi_3.0.2rc1)

Postby bear118 » Tue Apr 16, 2019 11:19 am

/** Begin a transaction.
* This will start a transaction on the bus. During a transaction, no
* other client to the SPI component can send or receive data. If
* another client is currently using the component then this call
* will block until the bus is released.
* \param device_index the index of the slave device to interact with.
* \param speed_in_khz The speed that the SPI bus should run at during
* the transaction (in kHZ)
* \param mode The mode of spi transfers during this transaction
void begin_transaction(unsigned device_index,
unsigned speed_in_khz, spi_mode_t mode);

But when I actually use it:
spi.begin_transaction(0, 100000, SPI_MODE_0);

I want 100Mhz, But actually only 25Mhz on the SCLK.(Look at it with an oscilloscope.)
User avatar
XCore Legend
Posts: 1358
Joined: Thu Jun 10, 2010 11:43 am

Postby mon2 » Thu Apr 18, 2019 7:44 am

Hi. A few points:

1) review this webpage:

https://www.xmos.com/developer/publishe ... 1.a&page=3

2) From the above webpage, the denominator of this speed formula is 2*x so:

100Mhz/2*x where x = 2 by default, leaving you with the observed 100/2*2 = 100/4 = 25Mhz bus speed.

Now, you may be able to use x = 1 for a max speed of 100/2 = 50Mhz bus speed.

3) The library you are using is for standard SPI use. Is that what you are using? Or should this be 100Mhz for QSPI interfacing?

There are limitations on the bus speed but our review was conducted a number of years ago when we were testing an assortment of QSPI flash devices and found back then that the QSPI bus speeds vary a great deal. Also found back then that Winbond (purchased from Digikey) could not support the shielded logic analyzer cable lengths mated to a Zeroplus LA (Taiwan). No issue if we used the Cypress (Spansion brand). After reporting our findings, Winbond sampled us some new chips from Taipei that contained a special register for changing the pin drive of the QSPI flash.

Summary: Not so sure that you will be able to hit the 100 Mhz bus speed for SPI interfacing but our info could be dated.

What exactly do you wish to do with the SPI interface? Stream out SPI data @ 100 Mhz? Based on the denominator using the divisor of 2, you may need to consider another approach like bit banging out your own routines.

Keep in mind that XMOS devices are bit banging mad machines so in theory it should be possible to craft up a custom routine to do this task. Start with a clock generator onto a single port pin @ 100 Mhz output. Or another thought is to apply an external 100 Mhz clock source that feeds into the XMOS device AND the external device to keep both in sync with a common clock. You could use a Si5351A PLL (25 Mhz ref xtal and dial up 100Mhz output). Just some random ideas.

Full source code for programming the Si5351A here:


You can source the small PCB with the PLL onboard from Adafruit as referenced in the posting.


Review this thread on how to clock out higher values with XMOS:


Hope this helps.

Who is online

Users browsing this forum: No registered users and 3 guests