I chained two sliceKits via SQUARE/CHAIN slot.
When I study the schematics of sliceKit, I found:
* When kit-0 boot from SPI flash, kit-1 boots from Link-B. (my study agrees with manual)
* When Kit-0 boot from JTAG:
--- Kit-1 boots fromJTAG ? (based on my study)
--- or Kit-1 boots fromLink-B? (according to manual)
I am somewhat confused. Thanks!
boot mode for two sliceKits chained
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Kit 1 should boot using Link B. Have a look at the XN file specified below, which describes the platform for chaining two slicekits:
http://www.xcore.com/questions/2633/xn- ... -slicekits
http://www.xcore.com/questions/2633/xn- ... -slicekits
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Yes, that is why I am confused:
* In .xn file, we see "boot source" for kit-1 as "link"
* BUT, if you check the schematics:
--- If "MSEL_IN_0=0" at Kit-0 (means booting from JTAG)
--- Then at Kit-1, "MSEL_IN_1 will also = 0" , because:
--------- MSEL_OUT_0 = MSEL_IN_0
--------- MSEL_IN_1 = MSEL_OUT_0
So my observation is: if kit-0 boots from JTAG, kit-1 must boot from JTAG too!
Can you check the schematics and tell how I am wrong?
Thanks!
* In .xn file, we see "boot source" for kit-1 as "link"
* BUT, if you check the schematics:
--- If "MSEL_IN_0=0" at Kit-0 (means booting from JTAG)
--- Then at Kit-1, "MSEL_IN_1 will also = 0" , because:
--------- MSEL_OUT_0 = MSEL_IN_0
--------- MSEL_IN_1 = MSEL_OUT_0
So my observation is: if kit-0 boots from JTAG, kit-1 must boot from JTAG too!
Can you check the schematics and tell how I am wrong?
Thanks!
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If you look at the B5 pin of Plug Chain connector, you will see PRSNT_MSTR_PIN. This pin decides if master is present or not (if the kits are chained or not). If XA-SK-XTAG2 slice (XTAG 2 slice) is connected, this pin is pulled low. If the kit is chained to other kit, then this pin is pulled high (have a look at the B5 pin of the Square slot).
Based on the status of the pin PRSNT_MSTR_PIN, boot mode is changed.
Based on the status of the pin PRSNT_MSTR_PIN, boot mode is changed.
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Yes, I did notice the B5 pin (PRSNT_MSTR_PIN) when I posted my last message.
* So I understand its function:
---"low" means it connects to XTAG2
--- "high" means it connects to Master-kit
But as you can see from the configuration table on schematics:
* If "MSEL_IN = 0", the value of "PRSNT_PIN" is irrelevant!
--------- (PRSNT_PIN means PRSNT_MSTR_PIN, right?)
* So again, I conclude to my observation:
--- if kit-0 boots from SPI, kit-1 boot from LINK-B! (I agree)
--- if kit-0 boots from JTAG, kit-1 must boot from JTAG too! (I am confused)
* So I understand its function:
---"low" means it connects to XTAG2
--- "high" means it connects to Master-kit
But as you can see from the configuration table on schematics:
* If "MSEL_IN = 0", the value of "PRSNT_PIN" is irrelevant!
--------- (PRSNT_PIN means PRSNT_MSTR_PIN, right?)
* So again, I conclude to my observation:
--- if kit-0 boots from SPI, kit-1 boot from LINK-B! (I agree)
--- if kit-0 boots from JTAG, kit-1 must boot from JTAG too! (I am confused)
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"Boot from JTAG" means "do not boot; do nothing after
reset". If you use this boot mode, the chips will be in a
known, clean state. The tools expect this state on all
chips when they want to upload a program. You could
in theory also let some chips boot from SPI or whatever,
and only upload the your program on some other chips,
but that is much more complex. The normal much simpler
way is to switch all chips to "JTAG boot mode" when MSEL
is pulled.
reset". If you use this boot mode, the chips will be in a
known, clean state. The tools expect this state on all
chips when they want to upload a program. You could
in theory also let some chips boot from SPI or whatever,
and only upload the your program on some other chips,
but that is much more complex. The normal much simpler
way is to switch all chips to "JTAG boot mode" when MSEL
is pulled.
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I do NOT quite understand your explanation. Let me simplify my question:
As I am chaining two sliceKits, I am understanding/expecting:
* Kit-1 should always boot from Link-B (not XTAG, not SPI), NO MATTER WHAT Kit-0 boots from.
Am I right?
As I am chaining two sliceKits, I am understanding/expecting:
* Kit-1 should always boot from Link-B (not XTAG, not SPI), NO MATTER WHAT Kit-0 boots from.
Am I right?
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Slicekit has things wired up in such a way that when your
XTAG has MSEL pulled ("boot from JTAG"), the chained
slicekit also gets that boot mode.
You want that, as I tried to explain.
XTAG has MSEL pulled ("boot from JTAG"), the chained
slicekit also gets that boot mode.
You want that, as I tried to explain.