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xConnect over twisted pair

Post by Guest »

Considering using xcore processors for a project that will require two physically separate processors that will be connected by a cable approx. 2 metres in length.

Preliminary designs have considered a variety of interconnect protocols including USB, CAN bus, asynchronous serial, Ethernet, dual-mode I2C.

With the xConnect link capability already in the xcore's, how feasible is it to adapt this to the task?

I have the impression that the data pins (2 x 2) would each require a differential transceiver so 8 wires would be required. Are there any tricks to reducing this? I would prefer to keep the wiring to 2 wires in each direction allowing power+ground over the same 4-pair cable.


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Bianco
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Post by Bianco »

http://www.youtube.com/watch?v=b3v44SGZA6M&t=2m11s

This may interest you.
A differential transceiver is recommended for longer distances, so I'm afraid you will require at least 10 wires.
brittain
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Post by brittain »

The xConnect architecture pdf states

"XMOS links can be switched between a slow serial mode that uses two wires in each direction (four wires in total), and a fast, wide mode that needs five wires in each direction (10 wires in total)."

So I guess it would be possible to use cat5e or cat6 (Maybe sheilded) cable and a DS90LV049 3V LVDS Dual Line Driver with Dual Line Receiver at each end. Using two pairs (four wires in total)
the other pairs could be used for power.

Has anyone tried this?
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Post by Guest »

It is not recommended to use xCONNECT links off the board using external wiring as external disturbances may cause the xCONNECT links not to work properly in some cases; as they are not designed to handle these kind of disturbances.
srinie
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Post by srinie »

Hi Brittain,
It is a nice idea!
Yes, it is possible to use the cables along with the mentioned LVDS transceiver using 2-wire mode - We ve tried a similar setup.
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Post by Guest »

srinie wrote:Hi Brittain,
Yes, it is possible to use the cables along with the mentioned LVDS transceiver using 2-wire mode - We ve tried a similar setup.
It is definitely possible. But it is not recommended because, xlinks does not have error handling mechanism if any of the data goes wrong.
srinie
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Post by srinie »

Yes Sethu, you are correct about that.

In general, an 'application task' handling the xlink communication should deal about such errors (incuding run time errors like link toekn exceptions, header corruptions etc) and recover the communication.

Hopefully there will be some application example or app note is to be available to provide example application recoveries.
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Folknology
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Post by Folknology »

srinie wrote:Yes Sethu, you are correct about that.

In general, an 'application task' handling the xlink communication should deal about such errors (incuding run time errors like link toekn exceptions, header corruptions etc) and recover the communication.

Hopefully there will be some application example or app note is to be available to provide example application recoveries.
I would love to see an example of this for softly handling errors as one of our ongoing designs will use a metre or so of lvds cabling over Cat5/6 for a 2 bit link.
srinie
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Post by srinie »

"AN01024: xCONNECT dynamic configuration demo" application note helps to deal with this functionality. Its now available for download at xmos.com.
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mon2
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Post by mon2 »

Thanks srinie for the very nice application note. We are working on a similar project which will use LVDS signalling to inter-connect XMOS CPUs and will appreciate more details on:

1) the referenced Slice board with the LVDS interface - if available and permitted, the project files / schematics

2) if full details are not available, please share the RJ45 pinout / wiring of the 2W LVDS lines as mapped on this XMOS LVDS slice board

so that we remain compatible with the XMOS version of this slice board.

Thanks !
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