Clarification on DEBUG_N for the L1-48

Technical discussions around xCORE processors (e.g. xcore-200 & xcore.ai).
bearcat
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Clarification on DEBUG_N for the L1-48

Post by bearcat »

Read this:
Thanks for the info on the DEBUG_N pin - I'll get it fixed in the datasheet. It is a typo, rather than a pinout error. DEBUG_N is not present on the XS1-L1-48TQFP. The DEBUG_N pin does not need to be wired on single core designs. It is used to stop multi-core skidding when the multi-processor designs are stopped for debug (so they are all stop at the same instruction - the JTAG chain is not that quick at stopping everything). If the DEBUG_N is not wired then (currently) the only issue is that your likely to get more skidding.
I wanted to double check the L1-48 can be used in a multi tile design and debugged. I am ok, with some skidding on instructions in other cores on a stop or breakpoint while debugging. There are no other issues currently?


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XMatt
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Post by XMatt »

We may start to use the debug pin at some point in the future but at the moment wiring it will have no effect. It is not currently used in the tools so it is not required currently for any designs other than future proofing, all that is required currently is that the JTAG chain is wired correctly.