Hello.
I'm developing 3 package multicore system consists of XUF216-512-C20 1IC, XU216-512-C20 2ICs.
This system is booted up properly when I test xTIMEComposer Studio's "Debug as" and "Run as".
But, when I write binary to flash by "Flash as", it doesn't work at all.
overall system is composed like below.
5wire 5wire
XUF216 ======= XU216 ========= XU216
XL4 XL7 XL4 XL4
I post this system's XN file which is modified from xk-audio-216-mc.xn
Thank you for reading.
3 Package Multicore binary doesn't work at flash boot.
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3 Package Multicore binary doesn't work at flash boot.
You do not have the required permissions to view the files attached to this post.
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Good morning Ritoseo,
Can you confirm that you have pull-ups on X0D04 and X0D06 on the two non-flash chips?
Your XN file has a few oddities in it
(a) you aren't listing the USB nodes of the right two chips; this is possibly ok
(b) the JTAG chain includes one of the USB nodes, which is almost certainly not right
But I don't think either of these should stop XFLASH from working.
Can you confirm that you have pull-ups on X0D04 and X0D06 on the two non-flash chips?
Your XN file has a few oddities in it
(a) you aren't listing the USB nodes of the right two chips; this is possibly ok
(b) the JTAG chain includes one of the USB nodes, which is almost certainly not right
But I don't think either of these should stop XFLASH from working.
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Apologies - each time I pressed submit I got an error...
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- Experienced Member
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I've fixed this bug with posting to topics that contains apostrophes. I'll delete the duplicate posts.
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Good evening migueljds.migueljds wrote:I've fixed this bug with posting to topics that contains apostrophes. I'll delete the duplicate posts.
Thank you for answering.
If it is fixed bug, can I get a patch file?
Is it resolved in xTimeComposer new version?
If it is right, would you let me know new SDK's release date?
Thank you very much.
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- Experienced Member
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Hi Ritoseo,
I have attached xlreg (you will need to remove the .txt extension I had to add to attach it here) which can be used to read out the current state of the network. Can you please run this as follows and post what is dumped out.
$ xgdb
(gdb) attach
(gdb) source xlreg
(gdb) xlreg
Many Thanks
Colin.
I have attached xlreg (you will need to remove the .txt extension I had to add to attach it here) which can be used to read out the current state of the network. Can you please run this as follows and post what is dumped out.
$ xgdb
(gdb) attach
(gdb) source xlreg
(gdb) xlreg
Many Thanks
Colin.
You do not have the required permissions to view the files attached to this post.
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Good evening Colin.colin wrote:Hi Ritoseo,
I have attached xlreg (you will need to remove the .txt extension I had to add to attach it here) which can be used to read out the current state of the network. Can you please run this as follows and post what is dumped out.
$ xgdb
(gdb) attach
(gdb) source xlreg
(gdb) xlreg
Many Thanks
Colin.
Thank you for your advice.
My test PCB is not here now. So, I can't check you notice.
I'll check a result and post it as soon as possible.
Many Thanks.
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- Junior Member
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Hi Colin,colin wrote:Hi Ritoseo,
I have attached xlreg (you will need to remove the .txt extension I had to add to attach it here) which can be used to read out the current state of the network. Can you please run this as follows and post what is dumped out.
$ xgdb
(gdb) attach
(gdb) source xlreg
(gdb) xlreg
Many Thanks
Colin.
Please find the following result for your reference.
Code: Select all
C:\Users\park>d:
D:\>xgdb
GNU gdb (XGDB) Community_14.1.0 (build 17291, Jul-23-2015)
Copyright (C) 2007 Free Software Foundation, Inc.
GDB is free software, covered by the GNU General Public License, and you are
welcome to change it and/or distribute copies of it under certain conditions.
Type "show copying" to see the conditions.
There is absolutely no warranty for GDB. Type "show warranty" for details.
This GDB was configured as "--host=i686-pc-mingw32 --target=xcore-elf".
For bug reporting instructions, please see: http://www.xmos.com/support.
(gdb) attach
0x00040c3a in ?? ()
(gdb) source xlreg
(gdb) xlreg
Thread 1 (tile[0] core[0]):
Thread 2 (tile[1] core[0]):
Thread 3 (tile[2] core[0]):
Thread 4 (tile[3] core[0]):
Thread 5 (tile[4] core[0]):
Thread 6 (tile[5] core[0]):
Node 0x0000
Routing ID 0x0000
PLL reg 0x00803f00 [OD=1+1 F=(63+1)/2 R=0+1]
ratio 16.000000 [320/384/400 @20/24/25 Mhz]
Reference Clock Divider 0x0003
BootMode : 0x0023
Dirs: 0000000000000000
Link 0 not enabled
Link 1 not enabled
Link 2 not enabled
Link 3 not enabled
Link 4 siu:F diu:T junk:F net:0 srctargetid:0 srctargettype:0 5w 199/199 d:0
snd:F rec:T
Link 5 siu:T diu:T junk:F net:0 srctargetid:130 srctargettype:0 5w 199/199 d:
0 snd:F rec:T
Link 6 siu:T diu:T junk:F net:0 srctargetid:130 srctargettype:0 5w 199/199 d:
0 snd:F rec:T
Link 7 siu:T diu:F junk:F net:0 srctargetid:131 srctargettype:0 5w 199/199 d:
0 snd:F rec:T
Link 8 not enabled
Tile routing ID 0x0000
PLL clock divider 99
PLink 0 siu:F diu:F junk:F net:0 srctargetid:0 srctargettype:0
PLink 1 siu:F diu:F junk:F net:0 srctargetid:0 srctargettype:0
PLink 2 siu:F diu:F junk:F net:0 srctargetid:0 srctargettype:0
PLink 3 siu:F diu:F junk:F net:0 srctargetid:0 srctargettype:0
Tile routing ID 0x0001
PLL clock divider 99
PLink 0 siu:F diu:F junk:F net:0 srctargetid:0 srctargettype:0
PLink 1 siu:F diu:F junk:F net:0 srctargetid:0 srctargettype:0
PLink 2 siu:F diu:F junk:F net:0 srctargetid:0 srctargettype:0
PLink 3 siu:F diu:F junk:F net:0 srctargetid:0 srctargettype:0
Node 0x0001
Routing ID 0x0004
PLL reg 0x00803f00 [OD=1+1 F=(63+1)/2 R=0+1]
ratio 16.000000 [320/384/400 @20/24/25 Mhz]
Reference Clock Divider 0x0003
BootMode : 0x0023
Dirs: 1111111111111111
Link 0 not enabled
Link 1 not enabled
Link 2 not enabled
Link 3 not enabled
Link 4 siu:F diu:T junk:F net:0 srctargetid:0 srctargettype:0 5w 4/4 d:1 snd:
T rec:F
Link 5 siu:T diu:T junk:F net:0 srctargetid:130 srctargettype:0 5w 199/199 d:
0 snd:F rec:T
Link 6 siu:T diu:F junk:F net:0 srctargetid:130 srctargettype:0 5w 199/199 d:
0 snd:F rec:T
Link 7 siu:F diu:F junk:F net:0 srctargetid:0 srctargettype:0 5w 29/29 d:0 sn
d:T rec:F
Link 8 not enabled
Tile routing ID 0x0004
PLL clock divider 99
PLink 0 siu:F diu:F junk:F net:0 srctargetid:0 srctargettype:0
PLink 1 siu:F diu:F junk:F net:0 srctargetid:0 srctargettype:0
PLink 2 siu:F diu:F junk:F net:0 srctargetid:0 srctargettype:0
PLink 3 siu:F diu:F junk:F net:0 srctargetid:0 srctargettype:0
Tile routing ID 0x0005
PLL clock divider 99
PLink 0 siu:F diu:F junk:F net:0 srctargetid:0 srctargettype:0
PLink 1 siu:F diu:F junk:F net:0 srctargetid:0 srctargettype:0
PLink 2 siu:F diu:F junk:F net:0 srctargetid:0 srctargettype:0
PLink 3 siu:F diu:F junk:F net:0 srctargetid:0 srctargettype:0
Node 0x0002
Routing ID 0x0006
PLL reg 0x80007c02 [OD=0+1 F=(124+1)/2 R=2+1]
ratio 20.833333 [416/500/520 @20/24/25 Mhz]
Reference Clock Divider 0x0004
BootMode : 0x0023
Dirs: 1111111111111111
Link 0 not enabled
Link 1 not enabled
Link 2 not enabled
Link 3 not enabled
Link 4 siu:F diu:T junk:F net:0 srctargetid:0 srctargettype:0 5w 4/4 d:1 snd:
F rec:T
Link 5 not enabled
Link 6 not enabled
Link 7 not enabled
Link 8 not enabled
Tile routing ID 0x0006
PLL clock divider 99
PLink 0 siu:F diu:F junk:F net:0 srctargetid:0 srctargettype:0
PLink 1 siu:F diu:F junk:F net:0 srctargetid:0 srctargettype:0
PLink 2 siu:T diu:F junk:F net:0 srctargetid:4 srctargettype:1
PLink 3 siu:F diu:F junk:F net:0 srctargetid:0 srctargettype:0
Tile routing ID 0x0007
PLL clock divider 99
PLink 0 siu:F diu:F junk:F net:0 srctargetid:0 srctargettype:0
PLink 1 siu:F diu:F junk:F net:0 srctargetid:0 srctargettype:0
PLink 2 siu:F diu:F junk:F net:0 srctargetid:0 srctargettype:0
PLink 3 siu:F diu:F junk:F net:0 srctargetid:0 srctargettype:0
(gdb)