TRST_N and RST_N Problems

Technical discussions around xCORE processors (e.g. xcore-200 & xcore.ai).
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Folknology
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Post by Folknology »

I am not sure, I will check. I am thinking it is 1v considering it is used as the input.
EDIT: Nvermind, it looks just like TRST_N and RST_N, it is pulled to 3v3, drops low, then jumps back up. But this is also staying low when the core is connected.
That suggests that the 303 is detecting an undervoltage on the 1V supply input when the xcore is connected. does this happen with a dummy load? (The 300ma dummy load I suggested is absolute max as stated in the L1 design docs, you could use a smaller load of course.)

Also the design examples from Xmos do not use a delay capacitor on the CD pin, not sure this would have an effect but you could also try disconnecting it.

regards
Al
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rp181
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Post by rp181 »

You are correct! With the processor connected, the 1v supply is at 0.825 volts.

Why do you think this is? I have a 33pf capacitor connecting from the output of the 2.2uh inductor (ferrite core) to the feedback pin. When the processor is not connected, the voltage reads at 1.068v.

the 1 volt line is slow to stabilize to .825v when I connect the processor, as the processor board has the 47uf VDD filter capacitor.

The updated XK1 schematics have the 10nf capacitor on CD, so I put it in there.
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Folknology
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Post by Folknology »

You are correct! With the processor connected, the 1v supply is at 0.825 volts.
Good so the 303 is just doing its job!
Why do you think this is? I have a 33pf capacitor connecting from the output of the 2.2uh inductor (ferrite core) to the feedback pin. When the processor is not connected, the voltage reads at 1.068v.
Sounds like the regulation is having loading issues, try it with dummy loads small to start with drawing more current by adding more resistors in parallel see what happens to the voltage as you do this.

Clearly the switchmode is having issues regulating the 1v supply, you need to determine if this is an input issues (current/voltage supply to the switchmode) or the switchmode itself. Make sure the input supply also can deliver the power required and has a suitable capacitor close by, is it supplied via 5v vin, is it within spec voltage wise for the switchmode? If it is the switchmode section itself check the inductor it should have a very low resistance, what inductor are you using?
the 1 volt line is slow to stabilize to .825v when I connect the processor, as the processor board has the 47uf VDD filter capacitor.
This makes sense if its not drawing much current.
The updated XK1 schematics have the 10nf capacitor on CD, so I put it in there.
No probs hadn't looked at the new version of the XK1 schematic.

regards
Al
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rp181
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Post by rp181 »

I tried connecting a pot to the 1v output, and heres what happened.

When No current was being drawn, the output was a clean sawtooth wave, probably +/- .05v. As I increased the current draw, the 1v line got noisier and noisier, with the amplitude of the noise growing. After the noise was large enough that the there was noise +/- 1v, the centerline began dropping. The average voltage started decreasing at around 50ma current draw.

EDIT: I do have the voltage regulator chip on a separate breakout board, and 30AWG wires run to the rest of the components on another board. Wire length is ~2", could this be altering the inductance and feedback enough to affect it?
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Folknology
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Post by Folknology »

When No current was being drawn, the output was a clean sawtooth wave, probably +/- .05v. As I increased the current draw, the 1v line got noisier and noisier, with the amplitude of the noise growing. After the noise was large enough that the there was noise +/- 1v, the centerline began dropping. The average voltage started decreasing at around 50ma current draw.
Ok so the switchmode is definitely not coping at all and is hence failing to regulate with any real load performance.
EDIT: I do have the voltage regulator chip on a separate breakout board, and 30AWG wires run to the rest of the components on another board. Wire length is ~2", could this be altering the inductance and feedback enough to affect it?
This really isn't a good idea, components such as the inductor and feedback resistors etc.. should be placed very closely to the SM chip itself to minimise resistive losses, stray inductance,capacitance and poor grounding (not to mention EMC noise). I would also make sure you have a good wirewound power inductor with DC resistance less than 0.4 ohms, it should have a current rating of at least 0.35Amps. something like this perhaps
L0806C2R2MDWIT

*PS the chip datasheets often have recommendations for the optimum PCB layout its well worth taking note of the advice they provide, it can save lots of issues later on.

regards
Al
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rp181
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Post by rp181 »

I used this inductor:
http://search.digikey.com/scripts/DkSea ... -2494-1-ND
I also tried it with another chip inductor:
http://search.digikey.com/scripts/DkSea ... -1610-1-ND
and both worked the same, so I am thinking it is the layout.
ale500
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Post by ale500 »

How big is your 1V Filter capacitor ? Do not forget that those inductor based regulators need aminimum of capacity at the output to work (some 4u/ some 10, some others more depending on the frequency of switching). Which regulator are you using ? Do you have a picture of your layout ?
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rp181
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Post by rp181 »

The regulator specifies 10u minimum, I have a 47u on the output. The Regulator is a NCP1521B.

I did have a layout, but the pin map was all wrong, so I had to green wire it. I am thinking this is the problem. I am going to try to get the wires as short as I can and see what happens.
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rp181
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Post by rp181 »

I can not get the switching regulator to work without a proper PCB layout, so I am using a linear regulator. With this regulator, I can not have the 1v supply come online after the 3v3 automatically. So for now, I am applying 3v3, and then manually connecting the 1v supply.

The core is now drawing ~100ma, which seems like a correct figure since maximum power consumption is 300ma. However, when I try to flash it or run a application, XDE is still telling me core 0 is not enabled.
Any idea what the problem could be?

I did notice that the TRST_N and RST_N lines are noisy once the 1v supply comes online, with a repeating arbitrary wave shape. This does not go low enough to pull these lines low, but is still there.

EDIT: I gave it a try again, and it started working. The program simply did some multiplication in a loop, and resulted in the current draw increasing by ~20ma. I am unable to replicate the results again, but I assume the problem lies in my mechanical connection of the voltage regulator input. It might be from noise, but is there a maximum time between VDDIO initialization to VDD init?
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Folknology
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Post by Folknology »

From the XS1-L design checklist:
2.1 Power supply sequencing
The VDDIO (and OTP_VDDIO if present) supply must be within specification (3.0V -
3.6V) before the VDD (core) supply is turned on. Specifically, the VDDIO supplies
should be within specification before VDD core reaches 0.4V

2.2 VDD ramp rate
The VDD (core) supply should ramp monotonically (constantly rising) from 0V to its
final value (0.95V - 1.05V) within 10ms to ensure correct startup.

2.3 VDD (core) supply capability
The VDD (core) supply should be capable of supplying at least 300mA for an L1 and
600mA for an L2 device assuming they may be operating at full capacity.

2.4 Power supply decoupling
Ensure the design has multiple decoupling capacitors per supply placed close to the
relevant supply pins. Example capacitors would be 0402 or 0603 size surface mount
devices of 100nF in value. The ground side of the decoupling capacitors should
have as short a path back to the ground pins of the device (mainly the centre pad)
as possible. A bulk decoupling capacitor of at least 10uF should be placed on each
supply.

2.5 PLL_AVDD
A low pass filter is highly recommended on this pin to avoid noise affecting the
internal PLL. An RC filter is used on the XMOS reference designs with a 1uF ceramic
capacitor and a 4.7R (L1) or 2.2R (L2) resistor. The filter (and especially the capacitor)
should be placed close to the PLL_AVDD pin.

2.6 Power on reset
The RST_N and TRST_N pins must be asserted (low) during or after power up. The
device should not be used until these resets have taken place.
As the errata in the datasheets show, the internal pullups on these two pins can
occasionally provide stonger than normal pullup currents. For this reason, an RC type
reset circuit is discouraged as behavior would be unpredictable. A voltage supervisor
type reset device is recommended to guarantee a good reset. This also has the
benefit of resetting the system should the relevant supply go out of specification.

Not sure if any of above is causing the issue. I would also be concerned about your trst/rst noise.

On the plus side at least you got something running!

regards
Al