Problem connecting two XS1-L2A
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- XCore Expert
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- Joined: Thu Dec 10, 2009 6:56 pm
Looking at the tools release history, the next release might be in the not so far future.
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- Member++
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- Joined: Mon May 02, 2011 12:39 pm
It seems that the problem is more general than just booting over the link from the master. I created a simple example with two L2 devices connected by X0LB of node 0 (master) but each having their own SPI boot flash. The tools still report this as an unsupported topology even though the link is not being used for boot.
If I change either of the devices to using X0LB of node 1 (the internal slave) everything compiles just fine.
Borrowing Bianco's ASCII art:
works.
This:
doesn't.
If I change either of the devices to using X0LB of node 1 (the internal slave) everything compiles just fine.
Borrowing Bianco's ASCII art:
Code: Select all
SPI Flash SPI Flash
| |
[node0] <--LINK--> [node1] <--LINK--> [node2] <--LINK--> [node3]
|________________________| |________________________|
| |
L2[0] L2[1]
This:
Code: Select all
SPI Flash SPI Flash
| |
[node1] <--LINK--> [node0] <--LINK--> [node2] <--LINK--> [node3]
|________________________| |________________________|
| |
L2[0] L2[1]
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- XCore Expert
- Posts: 754
- Joined: Thu Dec 10, 2009 6:56 pm
Multiple nodes with multiple flashes are indeed not supported.
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- Member++
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- Joined: Mon May 02, 2011 12:39 pm
I agree they aren't...unless they are. For the first configuration in my previous post, the tools spit out what appears to be a valid .xe file. Xobjdump --split dumps elf images for each of the four cores along with an accurate configuration file. I don't have real hardware in that configuration so I can't test it. However, it seems reasonable that xrun and xflash could handle the setup if the jtag chain were properly configured.Bianco wrote:Multiple nodes with multiple flashes are indeed not supported.
I can't speak to whether the link between the cores would come up correctly. It's a silly configuration that was useful as a test case.
My point was to test whether the tools could handle any configuration that linked two master cores of the L2. The error reported for the second (invalid) configuration was not related to the flash but was our old friend XN11049 griping about the link topology.