For this purpose, i use XC events on the 1 bit input clock port in the following way:
Code: Select all
select{
case clkIn when pinsneq(clk) :> clk:
if (clk!=0) //rising edge
{
// STUFF
}
break;
}
I want to make 100% sure that i never miss a single clock edge due to not handling events fast enough. Is that possible?