What exactly does "periph:XS1-SU" mean in a Node declaration

[aneves]

I'm new to XMOS and trying to get a grip on all of the terminology and the ecosystem of the XMOS build tools. I have a pretty good undertanding of most things so far except for one thing I can't quite understand. In several XN files I see that there are Node declarations with the following line:

Code: Select all

<Node Id="1" InPackageId="1" Type="periph:XS1-SU" Reference="usb_tile">

What exactly does "periph:XS1-SU" refer to? The specific XN file I am refering to is XS1-U8A-64-FB96-C5.xn.

I've read the XN specification which states that this means this type of a Node is an XS1-SU peripheral node. OK, great. But what is an XS1-SU? According to the XMOS product catalog, an XS1-SU is a completely separate microcontroler with a single ARM core. That doesn't make sense to me in this context since this XN file is descriping a single, different chip.

Since the XS1-U8A-64 has what appears to be a separate tile which contains the USB PHY and some other goodies, does this Node declaration allow the general purpose tile with 8 cores to communicate to the tile with the USB PHY and other things located there?

I've read a lot of documentation on XMOS and this nomenclature isn't very obvious to me. If there is something I missed or some documentationm that someone can point me to, that would be very helpful.
Thanks!

[Bianco]

Since the XS1-U8A-64 has what appears to be a separate tile which contains the USB PHY and some other goodies, does this Node declaration allow the general purpose tile with 8 cores to communicate to the tile with the USB PHY and other things located there?

This. The xCORE-U series used to be named XS1-SU but was later renamed.
There is no ARM core in the XS1-SU, perhaps you are confused with the xCORE-XA?

[aneves]

OK, I'm not sure how I thought an ARM core was involved. It's been a while.

Anyway, I still don't fully understand this Node attribute. It kind of makes sense when I look at the block diagram of an XS1 device.



I can explicitly see the "peripheral" tile on the right which contains the USB PHY, ADC, etc.

But when I look at the block diagram for the newer XE216-512-TQ128 in its datasheet, it's a little different. Datasheet link, block diagram on pg 2.

Everything is kind of smushed together. Is the concept the same though? In other words, if I define a Node as a peripheral, I am telling the tools that this tile reference points to the tile which could hold a USB PHY, ADC, etc and NOT one of the general purpose tiles with logical cores?

Thanks!

[will1979]

They are mushed together, but I think that central to it is the XCONNEXT block, which in both images connects the USB block with the XCORE blocks. So yes you are right, in both cases the Peripheral Node refers to a Node that holds the USB PHY rather than an XCORE.