*pointer++ problem, value++ ASM optimization, ASM questions

Technical questions regarding the XTC tools and programming with XMOS.
DemoniacMilk
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Posts: 191
Joined: Tue Jul 05, 2016 2:19 pm

*pointer++ problem, value++ ASM optimization, ASM questions

Post by DemoniacMilk »

I recently had compiler errors on using something like

Code: Select all

*pucDBuffer++ = (unsigned char) *pusRecWord;
what was fixed by changing the code to

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*pucDBuffer = (unsigned char) *pusRecWord;
pucDBuffer++;   // compiler doesnt like *pucDBuffer++ = ..
as seen in some other thread.

On checking the ASM file, latter was translated to:

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619                                   *pucDBuffer = (unsigned char) *pusRecWord;
00040a3e:   ldw (lru6)      r0, sp[0x2fb]
00040a42:   ldw (lru6)      r1, sp[0x2fe]
00040a46:   ldc (ru6)       r2, 0x0
00040a48:   ld8u (3r)       r1, r1[r2]
00040a4a:   st8 (l3r)       r1, r0[r2]
620                                   pucDBuffer++;   // compiler doesnt like *pucDBuffer++ = ..
00040a4e:   ldw (lru6)      r0, sp[0x2fb]
00040a52:   ldw (lru6)      r1, sp[0x2fc]
00040a56:   ldw (lru6)      r3, sp[0x2fd]
00040a5a:   add (2rus)      r0, r0, 0x1
00040a5c:   stw (lru6)      r0, sp[0x2fb]
00040a60:   stw (lru6)      r1, sp[0x2fc]
00040a64:   stw (lru6)      r3, sp[0x2fd]
and I have two questions:
What does the part in round brackets after the instruction mean?

Why does pucDBuffer++; translate into 3 loads/stores and a single add? Shouldn't one load/store be sufficient? The code was generated with optimization -O0.

On -O3 I cant even find the line, but it must be somewhere around here? (r6 = 0, r8 = 1)

Code: Select all

621                                   *pucDBuffer = (unsigned char)(*pusRecWord >> 8);
00040718:   or (3r)         r0, r0, r8
0004071a:   nop (0r)        
0004071c:   nop (0r)        
0004071e:   ld8u (3r)       r0, r0[r6]
00040720:   st8 (l3r)       r0, r3[r8]
238               out buffered port:8  portOutfsync){


User avatar
Ross
XCore Expert
Posts: 972
Joined: Thu Dec 10, 2009 9:20 pm
Location: Bristol, UK

Post by Ross »

The info in the bracket relates to the the instruction format. (3r) is three register, (lru6) is register with 16-bit immediate etc.

O0 is very inefficient!