Version: 1.01
Status: Beta
License: GPL
Download: /files/project_builds/XSMB-L1.zip
This project consists of two boards: A XS1-Stamp board with a XS1-L-TQFP128 and uSD card and a Mainboard with a 256kx16 SRAM connected to the XS1 and a FPGA connected via 8 pins (a 2 bit link plus 4 other IOs) with a 256kx16 SRAM and 12-bit color (4:4:4) VGA connector.
A separate header for a TFT breakout board and a PS/2 connector are also provided.
Note : The version c board has a small mistake: the 22pF capacitor C16 in the 1 V power supply has to be in parallel with R1 and not R2.
Images:
XSMB-L1
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I'll post the EAGLE files when I had tested the boards. I hope they work on first run :)
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What FPGA will it connect to?
Probably not the most confused programmer anymore on the XCORE forum.
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It is a XC3S50AN: Spartan3AN
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What free tools to program it can you use?
Are we talking about the linux kit for VHDL ?
I have only used "somebody else did the program" FPGA myself, I will not feel satisfied before I have written a FPGA program myself.
Are we talking about the linux kit for VHDL ?
I have only used "somebody else did the program" FPGA myself, I will not feel satisfied before I have written a FPGA program myself.
Probably not the most confused programmer anymore on the XCORE forum.
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I'm using Xilinx WebISE. You can get it from Xilinx Website.
As I only know Verilog it is what I'm planning on using, Of course everything can be ported to VHDL.
If you want a FPGA based board just get one of the numerous options available. This board is going to be available in two weeks or so.
As I only know Verilog it is what I'm planning on using, Of course everything can be ported to VHDL.
If you want a FPGA based board just get one of the numerous options available. This board is going to be available in two weeks or so.
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... hmm DDR2 access at 200MHz !? e.g. 400 Mreads/s
Probably not the most confused programmer anymore on the XCORE forum.
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Where does DDR2 fits in this picture ?.... Do you need it ? really ? that much and fast memory ?... can I ask what for ?
You have to have a SoC or a FPGA for DDR2, while with SDR you get away using an XMOS chip :)
You have to have a SoC or a FPGA for DDR2, while with SDR you get away using an XMOS chip :)
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Actually they will come on thursday, most probably :)
Some missing components have been ordered, I should have all the parts to build two of them, and if they work as expected there are two to give away!
Some missing components have been ordered, I should have all the parts to build two of them, and if they work as expected there are two to give away!
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For the moment I do not need the SDRAMxxx.
But it is intresting to know that there is.
Video and large FFTs uses alot of RAM. SDRAM is lowered prices / MB compared to SDRAM, and using block reads you do not achieve much higher speed with SDRAM in this configuration.
The XMOS doesn't have a native solution for DDR2 (read on each flank) so a solution for a memorycontroller comunicating over XLINKs can be an FPGA connected to DDR2 (and the XLINK)
But it is intresting to know that there is.
Video and large FFTs uses alot of RAM. SDRAM is lowered prices / MB compared to SDRAM, and using block reads you do not achieve much higher speed with SDRAM in this configuration.
The XMOS doesn't have a native solution for DDR2 (read on each flank) so a solution for a memorycontroller comunicating over XLINKs can be an FPGA connected to DDR2 (and the XLINK)
Probably not the most confused programmer anymore on the XCORE forum.