Hello all,
We have a product based on the xCORE-200 Multichannel Audio platform that is essentially a USB to SPDIF (optical/coax) converter. The product is based on the standard sample code and the coaxial SPDIF output can deliver up to 384000 due to adding the PLL clocking at 44/48 MHz (only at that rate). Basically it's the standard 192000 (x1) spdif routine but the D-type flipflop's clocked at twice the rate. It works well but every once and a while, usually withing a minute a very small pop/crack will be heard. The duration is around a millisecond and less. The product get used with top end HiFi and is quite noticeable. Other posts on this matter mention converting chucks of code to assembler due to the audio rate and overhead, but before that I want to explore the clocks.
1) How is the main clock set and can it be increased?
2) The xmos ref clock is 24Mhz off U11 PL611, would it be OK to take the reference off the PLL 44/48 clock instead? Would that in turn run the xmos faster?
Thanks.
xCORE-200 increase core clock or using PLL as reference Topic is solved
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The XE216 chip is rated for 500MHz maximum processor clock (I think the vast majority, if not all, xCORE-200 chips are similarly rated). Typically the internal PLL in the MCU is configured so it generates a 500MHz processor clock from the external reference. This is taken care of by the tools themselves based on the xn file (target file). For instance, here's the relevant line from an xn file I am using:
This shows I have a 25MHz oscillator input, and the tools should set the PLL so the PLL output to the processor clock is 500MHz. Yours will be pretty similar except it will say Oscillator="24MHz".
It might be possible to get a higher clock frequency on a specific chip, e.g. by setting SystemFrequency to 600MHz, but it wouldn't be recommended for production since that wouldn't be guaranteed to work. I suspect your target file already sets the processor clock to 500MHz. I believe, but I may be wrong, that if you don't specify a SystemFrequency then the tools default to 500MHz. Furthermore the oscillator input frequency max is 25MHz.
So the gist of what I am saying is
a. changing the oscillator input frequency to something higher than 25MHz probably won't work (exceeds maximum input frequency).
b. changing your processor frequency to something higher than 500MHz probably won't work (exceeds maximum processor frequency).
Therefore there is no benefit to changing the oscillator input frequency. You can get 500MHz SystemFrequency with 24MHz Oscillator. Once you've determined that you're running at 500MHz, the only ways to improve throughput are:
1. Set the compute intensive core core high priority (this can give you 100MHz on the high prio core, subject to caveats of your existing core count and how many are already high prio).
2. Improve the efficiency of your code.
Code: Select all
<Node Id="0" InPackageId="0" Type="XS2-L16A-512" Oscillator="25MHz" SystemFrequency="500MHz">
It might be possible to get a higher clock frequency on a specific chip, e.g. by setting SystemFrequency to 600MHz, but it wouldn't be recommended for production since that wouldn't be guaranteed to work. I suspect your target file already sets the processor clock to 500MHz. I believe, but I may be wrong, that if you don't specify a SystemFrequency then the tools default to 500MHz. Furthermore the oscillator input frequency max is 25MHz.
So the gist of what I am saying is
a. changing the oscillator input frequency to something higher than 25MHz probably won't work (exceeds maximum input frequency).
b. changing your processor frequency to something higher than 500MHz probably won't work (exceeds maximum processor frequency).
Therefore there is no benefit to changing the oscillator input frequency. You can get 500MHz SystemFrequency with 24MHz Oscillator. Once you've determined that you're running at 500MHz, the only ways to improve throughput are:
1. Set the compute intensive core core high priority (this can give you 100MHz on the high prio core, subject to caveats of your existing core count and how many are already high prio).
2. Improve the efficiency of your code.
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Thanks akp,
Understood. Regarding point 1, how is the core priority set, that would be on a per par{} basis?
1. Set the compute intensive core core high priority (this can give you 100MHz on the high prio core, subject to caveats of your existing core count and how many are already high prio).
2. Improve the efficiency of your code.
Cheers.
Understood. Regarding point 1, how is the core priority set, that would be on a per par{} basis?
1. Set the compute intensive core core high priority (this can give you 100MHz on the high prio core, subject to caveats of your existing core count and how many are already high prio).
2. Improve the efficiency of your code.
Cheers.
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It's set on a per-core basis. All you have to do is call set_core_high_priority_on() on the core you want high prio. So an example might be
Code: Select all
par {
on tile[0]: {
set_core_high_priority_on();
tile_task();
}
on tile[0]: (and so on)
}
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- Active Member
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- Joined: Tue Oct 15, 2019 10:36 am
Thanks for the help and answers!