Configuring xCORE-200 explorer ethernet PHY for loopback Topic is solved

Technical discussions related to any XMOS development kit or reference design. Eg XK-1A, sliceKIT, etc.
NelsonB
Member
Posts: 11
Joined: Fri Aug 19, 2016 2:56 pm

Configuring xCORE-200 explorer ethernet PHY for loopback

Postby NelsonB » Fri Sep 09, 2016 9:37 am

Hello,
I need to measure the precision of the timer used by the Ethernet_lib. To do so I made some loop back cabling (100Mb and 1Gb) that I plug in the RJ45.
This cabling works well, as I tested it on my laptop I can see my outgoing traffic coming back.
Unfortunately the PHY on the Xmos board doesn't seem to like it and link status still down.

Is there a way to configure the PHY in order to avoid such behaviour?

Nelson.
View Solution
peter
XCore Addict
Posts: 230
Joined: Wed Mar 10, 2010 12:46 pm

Postby peter » Thu Sep 15, 2016 10:15 am

Hi Nelson,

Have you tried disabling the auto-negotiation and simply forcing the PHY to the speed you require? Try changing the smi_configure() call to be:

Code: Select all

  smi_configure(smi, phy_address, LINK_1000_MBPS_FULL_DUPLEX, SMI_DISABLE_AUTONEG);
or

Code: Select all

  smi_configure(smi, phy_address, LINK_100_MBPS_FULL_DUPLEX, SMI_DISABLE_AUTONEG);
depending on the speed you want.

Peter
NelsonB
Member
Posts: 11
Joined: Fri Aug 19, 2016 2:56 pm

Postby NelsonB » Thu Sep 15, 2016 1:31 pm

Thanks Peter for your reply, but yes, already tested both LINK_100_MBPS_FULL_DUPLEX and LINK_1000_MBPS_FULL_DUPLEX with SMI_DISABLE_AUTONEG. No link detection so far.

Nelson.
User avatar
mon2
XCore Legend
Posts: 1756
Joined: Thu Jun 10, 2010 11:43 am

Postby mon2 » Thu Sep 15, 2016 2:09 pm

A few thoughts:

a) believe the XCORE board is based on the AR8035 PHY

b) review section 2.3.2 of the AR8035 PHY on how to enable external cable loopback mode:
2.3.2 External Cable Loopback
External cable loopback loops Tx to Rx through
a complete digital and analog path and an
external cable, thus testing all the digital data
paths and all the analog circuits. Figure 2-2
shows a block diagram of external cable
loopback.
Full AR8035 Datasheet is available here:
http://www.redeszone.net/app/uploads/2014/04/AR8035.pdf
NelsonB
Member
Posts: 11
Joined: Fri Aug 19, 2016 2:56 pm

Postby NelsonB » Thu Sep 15, 2016 2:24 pm

Thanks @Mon2, that sounds great (always have a look at the hardware datasheet...)!
I'll give you some feedback once I tested it!
Nelson.
NelsonB
Member
Posts: 11
Joined: Fri Aug 19, 2016 2:56 pm

Postby NelsonB » Mon Sep 26, 2016 2:22 pm

Well, thanks to the AR8035 datasheet I made it work.

There are several loopback modes modes for this PHY.
A digital loopback mode is already implemented in the smi_set_loopback_mode function of the lib_ethernet library.
For cable loopback mode, I had to access to debug registers (cf page 16 of AR8035 datasheet for the method)
I used the following code, with lib_ethernet v3.1.2:

Code: Select all

#define BASIC_CONTROL_REG                  0x0
const int phy_address = 0x4;

  // read debug register 0xB
  smi.write_reg(phy_address, 0x1D, 0xB);
  uint16_t debug_reg_0xb = smi.read_reg(phy_address, 0x1E);

  // read debug register 0x11
  smi.write_reg(phy_address, 0x1D, 0x11);
  uint16_t debug_reg_0x11 = smi.read_reg(phy_address, 0x1E);

  // disable hibernate
  debug_reg_0xb = debug_reg_0xb & ~ (1 << 0x15);
  // enable external loopback
  debug_reg_0x11 = debug_reg_0x11 | (1 << 0x0);

  // write debug register 0xB
  smi.write_reg(phy_address, 0x1D, 0xB);
  smi.write_reg(phy_address, 0x1E, debug_reg_0xb);

  // write debug register 0x11
  smi.write_reg(phy_address, 0x1D, 0x11);
  smi.write_reg(phy_address, 0x1E, debug_reg_0x11);

  // write control register
  smi.write_reg(phy_address, BASIC_CONTROL_REG, 0x8140); // 1000Mbits full duplex
For 100Mb speed replace 0x8140 value by 0xA100
I didn't manage to get the receive packets in 10Mb mode (value 0x8100)

Thanks for your help,
Nelson.

Who is online

Users browsing this forum: No registered users and 2 guests