Hi,
for my application using the XK-1A Dev Board, I would need 18 1-bit wide I/O.
On the XK-1A hardware manual it is written that 8 pins can be used as 1-bit I/O while other pins can be used as 4 or 8 bit I/O.
As far as I understood, all the pins can be configured as 1-bit I/O modyfing the *.xn file, but I have no idea about how to do that.
Can you give me some suggestions?
Thanks
[XK-1A] - Configure all the pins as 1-bit port
-
extremeRider
- Member++
- Posts: 19
- Joined: Tue Jun 16, 2015 10:50 pm
Hello Alex and welcome to the XMOS club :) The XK-1A is a very nice board to work with and we have used it often on testing assorted coding efforts in the lab. Let me try to help to clarify some of the details.
Page 8 of the following document displays the pin mappings for this XK-1A board:
http://www.farnell.com/datasheets/1738856.pdf
* there may be a more current version of this document on the xmos.com website here but you have to log in to download
https://www.xmos.com/search/content?term=XK-1A
The CPU on this design has been renamed and is P/N XS1-L01A-TQ128.
Current datasheet for the XS1-L01A-TQ128 is posted here:
https://www.xmos.com/download/public/XS ... eet(L).pdf
Armed with the CPU datasheet and the schematic of your XK-1A board, the details should become more clear as follows:
See page 4 of the CPU datasheet to view the permutations of the GPIO pins. The port widths are to be read from LEFT to RIGHT. The smaller port widths will prevent you from using the larger port widths on the right of the table as they do overlap. That is, the definitions on the LEFT of the table are of higher assignment priority then those on the RIGHT of the table.
Take for example the following:
If you decide to use P4A0, P4A1, P4A2, P4A3 then you will NOT have access to P8A0, P8A1, P8A6, P8A7 on the P8A (8 bit port) since they share the same set of pins. On this configuration, if you perform a write to the P4A block of pins then the above P4A0..P4A3 will configure to your written value. Respectively, if you perform the same write exercise to the 8 bit port P8A then your value will not be seen on P8A0, P8A1, P8A6, P8A7 (since they were already assigned to the P4A block of pins). However, the balance of the 8 bit port will reflect the value being written to the physical pins.
It is not possible to use the port pins other than how they are defined by the posted table in the CPU datasheet. Also, it is possible that some of the port pins are not bonded out on the PCB layout of the XK-1A.
Moving forward, you can configure to use the 2 of the 8 port pin blocks available on the XK-1A kit as a single 16 bit port = P16A or even P32A. This info is from the CPU datasheet and appears to be missing from the XK-1A user manual. However, the 32 bit port access is not complete since only 16 port pins are being mapped as shown in the table. This means that in a single clock cycle you may output or input a 16 bit value.
On the XMOS devices, as a general default, ALL port pins must be accessed in the same direction. This is very important to your design and the use of XMOS devices. So if you define the port to be input then ALL port pins on that port block must be INPUT and respectively the same if defined for OUTPUT mode. However, you can use a block of pins to be INPUT in your code and then use as OUTPUT with your code but again, all pins must be in the same direction at the same time.
Back to your project, do you really need 18 port pins where each port pin could be in INPUT or OUTPUT mode, independently ? if yes, then you may not have this many free single port pins available for this kit and/or CPU device. However, suggest for you to confirm this by reviewing the datasheet for the CPU against the XK-1A schematic. From a quick review, it appears the CPU offers 16 of single port pins but the XK-1A hardware manual does not list this many on the bonded out PCB holes.
8 port pins seen in the hardware manual are:
P1A0..P1H0
yet the CPU datasheet lists 16 of single port pins:
P1A0..P1P0.
On the use of the XK-1A kit and your testing, recommend that you download the latest xTimeComposer and create a new project with the XK-1A as the target. This will import all of the relevant port definitions for you automatically (including the necessary XN file). Then proceed to test to use with your output devices.
With some regret, the XK-1A is an older but excellent kit and the user manual has not been refreshed so you can kill a lot of time due to this out of sync with the tools and respective documentation.
Nice reading on topic material:
https://www.xmos.com/node/17653?page=26
The XMOS devices are quite advanced with ultra low latency. They are the perfect middle ground between the old school CPU and FPGA devices. Noting this, you could group the single port pins to be clocking data out or in at the same time as the 4 bit or 8 bit or 16 bit cluster of port pins. Perhaps you can find a solution for your design.
Write back if there are other questions. There is a bit of a learning curve to these devices but will be worth the effort. Hope this helps.
Kumar
Page 8 of the following document displays the pin mappings for this XK-1A board:
http://www.farnell.com/datasheets/1738856.pdf
* there may be a more current version of this document on the xmos.com website here but you have to log in to download
https://www.xmos.com/search/content?term=XK-1A
The CPU on this design has been renamed and is P/N XS1-L01A-TQ128.
Current datasheet for the XS1-L01A-TQ128 is posted here:
https://www.xmos.com/download/public/XS ... eet(L).pdf
Armed with the CPU datasheet and the schematic of your XK-1A board, the details should become more clear as follows:
See page 4 of the CPU datasheet to view the permutations of the GPIO pins. The port widths are to be read from LEFT to RIGHT. The smaller port widths will prevent you from using the larger port widths on the right of the table as they do overlap. That is, the definitions on the LEFT of the table are of higher assignment priority then those on the RIGHT of the table.
Take for example the following:
If you decide to use P4A0, P4A1, P4A2, P4A3 then you will NOT have access to P8A0, P8A1, P8A6, P8A7 on the P8A (8 bit port) since they share the same set of pins. On this configuration, if you perform a write to the P4A block of pins then the above P4A0..P4A3 will configure to your written value. Respectively, if you perform the same write exercise to the 8 bit port P8A then your value will not be seen on P8A0, P8A1, P8A6, P8A7 (since they were already assigned to the P4A block of pins). However, the balance of the 8 bit port will reflect the value being written to the physical pins.
It is not possible to use the port pins other than how they are defined by the posted table in the CPU datasheet. Also, it is possible that some of the port pins are not bonded out on the PCB layout of the XK-1A.
Moving forward, you can configure to use the 2 of the 8 port pin blocks available on the XK-1A kit as a single 16 bit port = P16A or even P32A. This info is from the CPU datasheet and appears to be missing from the XK-1A user manual. However, the 32 bit port access is not complete since only 16 port pins are being mapped as shown in the table. This means that in a single clock cycle you may output or input a 16 bit value.
On the XMOS devices, as a general default, ALL port pins must be accessed in the same direction. This is very important to your design and the use of XMOS devices. So if you define the port to be input then ALL port pins on that port block must be INPUT and respectively the same if defined for OUTPUT mode. However, you can use a block of pins to be INPUT in your code and then use as OUTPUT with your code but again, all pins must be in the same direction at the same time.
Back to your project, do you really need 18 port pins where each port pin could be in INPUT or OUTPUT mode, independently ? if yes, then you may not have this many free single port pins available for this kit and/or CPU device. However, suggest for you to confirm this by reviewing the datasheet for the CPU against the XK-1A schematic. From a quick review, it appears the CPU offers 16 of single port pins but the XK-1A hardware manual does not list this many on the bonded out PCB holes.
8 port pins seen in the hardware manual are:
P1A0..P1H0
yet the CPU datasheet lists 16 of single port pins:
P1A0..P1P0.
On the use of the XK-1A kit and your testing, recommend that you download the latest xTimeComposer and create a new project with the XK-1A as the target. This will import all of the relevant port definitions for you automatically (including the necessary XN file). Then proceed to test to use with your output devices.
With some regret, the XK-1A is an older but excellent kit and the user manual has not been refreshed so you can kill a lot of time due to this out of sync with the tools and respective documentation.
Nice reading on topic material:
https://www.xmos.com/node/17653?page=26
The XMOS devices are quite advanced with ultra low latency. They are the perfect middle ground between the old school CPU and FPGA devices. Noting this, you could group the single port pins to be clocking data out or in at the same time as the 4 bit or 8 bit or 16 bit cluster of port pins. Perhaps you can find a solution for your design.
Write back if there are other questions. There is a bit of a learning curve to these devices but will be worth the effort. Hope this helps.
Kumar
-
extremeRider
- Member++
- Posts: 19
- Joined: Tue Jun 16, 2015 10:50 pm
Hello Kumar,
thank you so much for your amazing explanation. I'm going to take a look on all the documents that you linked.
About my project, yes, I need 18 pins. But I can reorganize better the I/Os.
For example, I have 4 microswitches that I would need to read at each loop in order to detect contacts.
But, based on what you suggest, I could try to group these 4 microswitches in order to use 1 4bit port insead of 4 1-bit ports, since all the 4 microswitches are input. Am I right?
Bye
thank you so much for your amazing explanation. I'm going to take a look on all the documents that you linked.
About my project, yes, I need 18 pins. But I can reorganize better the I/Os.
For example, I have 4 microswitches that I would need to read at each loop in order to detect contacts.
But, based on what you suggest, I could try to group these 4 microswitches in order to use 1 4bit port insead of 4 1-bit ports, since all the 4 microswitches are input. Am I right?
Bye
For example, I have 4 microswitches that I would need to read at each loop in order to detect contacts.
But, based on what you suggest, I could try to group these 4 microswitches in order to use 1 4bit port
Correct. Many of the XMOS devices feature an internal weak pull-up (confirm with the respective data sheets) but we always allow for a resistor network (ie. 4 in a single package in 1206 size is common for us & extremely low cost - see Yageo, etc. at Digikey) and then the dip switch to ground. This way you are guaranteed of a solid pull-up if the switch is open. We prefer to use the
BD04 by C&K (Future Electronic & Digikey both carry this brand) (we are around $ 0.35 USD in 500 piece qty)
http://www.ck-components.com/bd/dip,10449,en.html
- because the switch can be machine washed as it is sealed. So, to plan ahead for automated production of your design someday, consider this or similar dipswitch. Many models on the market are not sealed so can lead to premature death of the switch.
The single bit port pins should really be your reserved pins for rare interfacing requirements such as perhaps I2C or SPI, etc. where each pin is required to be independent of each other. You have the right idea that the largest task at hand is the organization of the port pin groups for your immediate project.
Some more lecturing which hoping is helpful - the XMOS device you are working with are 3.3 volt devices for the GPIO pins. They are NOT 5 volt tolerant (at least not documented to be) so be careful with your interfaces. The XMOS devices to date do require the multiple power supply rails to be sequenced in a specific order before releasing reset which the XK-1A board is doing so do review the most recent documentation on the power supply requirements, current draw and certainly the schematics to avoid any losses on PCB designs and prototyping efforts. If you follow the XK-1A schematic you should be safe but there are more current components that may be worth a look for a custom design.
The more recent XMOS devices are rich in features including support for a few more commands and now include onboard Ethernet PHY for Gigabit speed or USB 2.0 (high speed) yet at relatively low costs if you consider that the component features 16 cores in a single device. This is the XE series which are about to be released through Digikey. However, the device you have on the XK-1A is very stable and available at a lower cost than others.
We have a lower cost evalboard in development for the XE device to launch in the fall.
When you are ready, write back and can provide some cost savings (there are other postings on this forum on this subject as well) on affordable PCB prototyping firms and related parts in China that we have used with excellent results. Digikey is great for many of the parts in assorted volumes but every bit helps to save on the final build costs.
But, based on what you suggest, I could try to group these 4 microswitches in order to use 1 4bit port
Correct. Many of the XMOS devices feature an internal weak pull-up (confirm with the respective data sheets) but we always allow for a resistor network (ie. 4 in a single package in 1206 size is common for us & extremely low cost - see Yageo, etc. at Digikey) and then the dip switch to ground. This way you are guaranteed of a solid pull-up if the switch is open. We prefer to use the
BD04 by C&K (Future Electronic & Digikey both carry this brand) (we are around $ 0.35 USD in 500 piece qty)
http://www.ck-components.com/bd/dip,10449,en.html
- because the switch can be machine washed as it is sealed. So, to plan ahead for automated production of your design someday, consider this or similar dipswitch. Many models on the market are not sealed so can lead to premature death of the switch.
The single bit port pins should really be your reserved pins for rare interfacing requirements such as perhaps I2C or SPI, etc. where each pin is required to be independent of each other. You have the right idea that the largest task at hand is the organization of the port pin groups for your immediate project.
Some more lecturing which hoping is helpful - the XMOS device you are working with are 3.3 volt devices for the GPIO pins. They are NOT 5 volt tolerant (at least not documented to be) so be careful with your interfaces. The XMOS devices to date do require the multiple power supply rails to be sequenced in a specific order before releasing reset which the XK-1A board is doing so do review the most recent documentation on the power supply requirements, current draw and certainly the schematics to avoid any losses on PCB designs and prototyping efforts. If you follow the XK-1A schematic you should be safe but there are more current components that may be worth a look for a custom design.
The more recent XMOS devices are rich in features including support for a few more commands and now include onboard Ethernet PHY for Gigabit speed or USB 2.0 (high speed) yet at relatively low costs if you consider that the component features 16 cores in a single device. This is the XE series which are about to be released through Digikey. However, the device you have on the XK-1A is very stable and available at a lower cost than others.
We have a lower cost evalboard in development for the XE device to launch in the fall.
When you are ready, write back and can provide some cost savings (there are other postings on this forum on this subject as well) on affordable PCB prototyping firms and related parts in China that we have used with excellent results. Digikey is great for many of the parts in assorted volumes but every bit helps to save on the final build costs.
Hi,extremeRider wrote: As far as I understood, all the pins can be configured as 1-bit I/O modyfing the *.xn file, but I have no idea about how to do that.
Can you give me some suggestions?
There is no need to modify the xn file to bring out such a configuration - On a general note, the port priorities work out as follows: 1 > 4 > 8 > 16 > 32;
say if a 32 bit port is used, and a 16-bit port is also used, the 16 bit port config takes the priority; in the firmware, you may need to ensure to drive rest of the pins of the 32-bit port.
Coming back to your problem, can we use 4 or 8 bit port as a single bit port?
Answer is simple yes - latest gpio library allows us to do this very easily. It allows separate access to multibit ports and also allows to use it across tiles. For more details, refer to
https://www.xmos.com/download/private/l ... rc1%29.pdf
An implementation example is also available @
https://www.xmos.com/download/private/A ... rc3%29.pdf
Regards,
/srini
Hi Kumar,mon2 wrote:
The single bit port pins should really be your reserved pins for rare interfacing requirements such as perhaps I2C or SPI, etc. where each pin is required to be independent of each other. You have the right idea that the largest task at hand is the organization of the port pin groups for your immediate project.
Thanks for the details and practical pointers!
Just wanted to share a note that the latest i2c lib offering using a multi-bit port for sharing clk and data lines and more flavors. This link has more useful insights:
http://www.xcore.com/questions/3357/new ... omposer-14
Regards,
Srini