Is it possible to change UIFM_FLAG_x_PORT pins?

[kallsop]

These ports are defined in XUD_UIFM_Ports.xc:

in  port flag0_port      = UIFM_FLAG_0_PORT;
in  port flag1_port      = UIFM_FLAG_1_PORT;
in  port flag2_port      = UIFM_FLAG_2_PORT;

#define UIFM_FLAG_0_PORT         XS1_PORT_1N
#define UIFM_FLAG_1_PORT         XS1_PORT_1O
#define UIFM_FLAG_2_PORT         XS1_PORT_1P

on stdcore[USB_CORE]:in  port flag0_port      = UIFM_FLAG_0_PORT;
on stdcore[USB_CORE]:in  port flag1_port      = UIFM_FLAG_1_PORT;
on stdcore[USB_CORE]:in  port flag2_port      = UIFM_FLAG_2_PORT;

Those 3 ports don't appear to be used anywhere else in the code. Yet, moving them to different pins, seems to break the code in some way. Is there an explanation anywhere for what these pin functions are doing and how can they be moved?

 

[mon2]

Hi kallsop. According to the assorted documents supporting the XUD (XMOS USB Device) Library, the following pins are used (reserved) for internal purposes:

#define UIFM_FLAG_0_PORT         XS1_PORT_1N
#define UIFM_FLAG_1_PORT         XS1_PORT_1O
#define UIFM_FLAG_2_PORT         XS1_PORT_1P

If you are unable to locate direct references to these pins in the xc source files, the source may be using some assembler code. In the SRC tree, do you see any .S files ? The .S suffixed files are the assembler source files. Suspecting the above port pins are being used via assembly code.

See the XS1-L or XS1-U datasheet for more specifics on the pins which become reserved if using the XUD library.

3.1.2 U-Series

E XMOS USB Interface - for XS1-L datasheet

https://www.xmos.com/support/xcore/docu ... 374&page=2

Update: Found some more details on the above are used by reviewing the  XS1-U6A-64 datasheet - see Section F - USB PHY

XS1_PORT_1N
flag1
XS1_PORT_1O
flag2
XS1_PORT_1P
flag3

The USB PHY is peripheral 1. The control registers are accessed using 32-bit
reads and writes (use write_periph_32(device, 1, ...) and read_periph_32(device,
> 1, ...) for reads and writes).