How to use pull-ups on buffered ports?

[140dB]

I would like to enable the internal pull up on a port. This particular port is being used for a SPI bus application and seems to be having trouble rising back to the 3.3V level after a transition. I could use the internal resistors on the other IC I am communicating with but I feel it makes sense for the XMOS to control the PU and PD resistors seeing how I have it running as the master. I would like to enable a pull up on at least the MISO due to the fact that it is the most problematic. 

I have successfully enabled a pull up on the CS line which is a single defined port but seem to be getting into trouble with the structure and bufferd ports already used by the open source. 

I have tried things like:

set_port_pull_up(spi_if.miso);

set_port_pull_up(spi_master_io .miso);

The above lines seem to give a runtime error but will build just fine. I am using the SPI_MASTER.H file which includes:

typedef struct spi_master_interface
{
    clock blk1;
    clock blk2;
    out buffered port:8 mosi;
    out buffered port:8 sclk;
    in  buffered port:8 miso;
} spi_master_interface;
 
I have included this in my application code which tie back to actual port pins:
 
on stdcore[SPI_TILE] : spi_master_interface spi_master_io =
{
                       //BUFFERS:
    XS1_CLKBLK_3,       //clock blk1
    XS1_CLKBLK_4,       //clock blk2
    PORT_INT_MOSI,      //out buffered port:8 mosi
    PORT_INT_SCLK,      //out buffered port:8 sclk
    PORT_INT_MISO       //in  buffered port:8 miso
};
 
What am I overlooking here?
 
 Much love xmos'ians! 

 

[mon2]

Hi. Not sure if the pull-down can be disabled on the XS1-L devices (perhaps someone else can chime in on this topic) but the XS1-L datasheet is reporting the PD (pull-down) resistance to be a typical 35k (see table 11.2, Figure 15, page 17 of the XS1-L4 datasheet). This is relatively a weak resistance which can be overridden using an external pull-up resistor of a stronger value such as 2.2k / 2.7k.

Before you go there, are you truly using the SPI interface ? If yes, then review the source code to check if there is even a need for the external pull-up resistor. Often for SPI interfaced devices, the port pins are driven high and driven low by the SPI master (XMOS in this case). If using I2C then yes there is an obligation for external pull-up resistors since in this case, the I2C master will drive the pin LOW but will tri-state or float for a high - hence the reason for the pull-up to allow the "floating" line to be pulled HIGH.

So if you do decide to apply a pull-up for SPI (which may be redundant if the XMOS is able to output the HIGH level), then use a value like 2.2k or similar and review this resistor voltage divider formula with

R1 = 2200 ohms

R2 = 35000 ohms (internal PD on XMOS XS1-L)

V = 3.3 volts

assuming a relatively light load, this will yield a voltage out of 3.1 volts which is ample to treat as a HIGH.

http://hyperphysics.phy-astr.gsu.edu/hb ... oldiv.html

If you can share more details on your project and/or target device(s), can review the code to check if the pins are driven (often said to be totem pole drivers) for which case, no external resistors are required for SPI interfacing. I2C, required, one for each of the SDA and SCLK lines. Do you have a logic analyzer ? You can pickup some low cost units through Ali Express / Ebay that will be worthy for such experiments (many are < $ 20 USD) with protocol analysis.

Hope this helps.

Update: Saw more in your post above - what are your lead lengths ? Can you share any details of your external device ? What is the bus speed for the SPI interface ? Had some similar fun working with the SPI flash code on github using QUAD SPI flash earlier this year. You must watch your quality of wires (shielding + lead lengths) between the XMOS and the SPI devices at the higher data rates. Found a large disparity between SPI flash vendors (ie. most Winbond devices are NOT able to drive the bus with the longer cables vs. Spansion which worked fine in the electrically noisy lab tests). The current generation of Winbond flash feature a register to increase / lower the drive currents of the port pins.