AVB with USB slicekit

[nico]

Hi,

I have developed a custom audio application using xCore USB slicekit. Fro this application, I use an audio slice kit and a custom slice board that requires at least 6 GPIO.
I was wondering if it is possible to add AVB support to this application using the Ethernet slice.
It is not clear to me if AVB is possible with this setup.
Any ideas about that ?

Another option would be to use the xCore-200 slicekit with the Ethernet slice but I can't find if this is going to work. As far as I understand, this slicekit uses 3 different port mapping and it is not clear to me if Ethernet slice is compatible with it. I could not find an updated version of the slice board selector that includes xCore-200 slicekit.

The xCORE-200 Multichannel Audio Platform would be perfect if it had at least the 6 GPIOs that my application requires ...

Thanks for your advices on this topic.

Nicolas

[mon2]

Hi Nico. From the Ethernet Slice datasheet (page 4):

https://www.xmos.com/download/private/X ... 2.a%29.pdf

this adapter is compatible with:

STAR
TRIANGLE
SQUARE
CIRCLE

expansion connectors (PCIe style).

If you consider to use the XCORE-200 SliceKit then the nomenclature has changed a bit according to page 5:

https://www.xmos.com/download/private/x ... 1v1%29.pdf

and this new development board presents:

(PCIe connecter based expansion slots)

Type

1 = STAR pinout
2 = TRIANGLE pinout
3 = SQUARE pinout
4 = CIRCLE pinout

so you will be fine to consider this devkit with the Ethernet Slice for your project. Based on costs received on the new XCORE-200 series, I think it is wise to consider this new version of the CPU. Also, do review the XE216 version which offers an internal Gigabit Ethernet interface and you only have to marry a < $1 USD Atheros PHY + RJ45 with magnetics to be up and running. Be sure to review if the use of this CPU with Gigabit port allows for the free ports of your choice.

This chart should prove to be useful if dealing with the XCORE-200 targets:

XCORE-200 Port Map

Also, be cautious to which CPU TILE maps to which PCIe connector !! The hardware guide (schematics) for the board will prove to be useful here. That consumed some wasted time on our side when we tested the Ethernet slice board on the original XS1 slicekit.

[nico]

Thanks for your answer. xCore-200 Slicekit seems to be the good choice.

However, since I already have a USB slicekit, do you think that AVB is possible with this kit and the ethernet slicekit ?

Thanks

[mon2]

The short answer is YES.

Review this landing page:

http://www.xmos.com/support/software/tsn

Note the 3rd kit for development on this webpage is based on the same foundation CPU as your USB SliceKit. The key point to keep in mind with XMOS is that the processors are ultra fast bit-banging machines which with software can be morphed to support virtually any protocol / ip. Support of Ethernet, USB to xx bridging including I2S will not be an issue with your USB SliceKit. Respectively the strength is in the proven IPs for these devices. From another post you made on this user forum, it appears you are after a bridge for USB to multiple I2S ports ?

If yes, it may be wise to just bite the bullet and to source the first audio kit shown on the same webpage as this kit appears to be developed for your purpose. Do confirm the specs of the kit and related IP. The time you will be save using this kit will be worth the investment for your project and respectively an earlier out the door and to the market for your ROI.

http://www.xmos.com/support/boards?product=18334

http://www.xmos.com/support/appnotes/an00162

Required hardware

The example code provided with the application has been implemented and tested on the xCORE-200 Multichannel Audio Platform.

Be sure to review the full specs of these kits and related IP before jumping in to the waters for your development. The XCORE-200 does offer some improvements over the earlier processor designs and from what we saw, cost reductions as well so the move to XCORE-200 series for us is practical.

[nico]

Thanks for your answer and for the pointers.

I will try to get ethernet avb working with usb slice kit for this application.

My other post is related to another application where I need to drive 16 i2s signals. I designed a board using XEF216-512-TQ128 but I had to remove the ethernet side because there is not enough IOs on that chip. Well in fact, there are enough IOs but I am not comfortable with using a 4bit or a 8bit port to drive 4 or 8 i2s signals (given that clocks signals are the same for all ports)

So by the way, I ask a question that might have been asked several times : is it possible to split a 4bit port into 4 1bit ports ?

thanks

[mon2]

The 4 bit port must be supportive of all bits in the same direction. That is, if you wish to output then all 4 bits on that port will be output bits and respectively if input then all 4 bits must be input. It is not possible to split the 4 bit port into individual I/O on a per bit basis if in different directions.

If you will be using an external clock source to clock your IP then you are required to use a single bit port only to accept this external clock. This is a fixed rule.

[nico]

Ok thanks, that is what I understood. But if the clock signals are on 1bit ports, is it possible to use a 8bit port to output 8 i2s signal at the same time ?
In that case, is there a piece of code that does the trick ?

[mon2]

Yes, it should be possible to support this request.

Have a look at this webpage on details on how clocked I/O works:

https://www.xmos.com/published/xc-clock ... and-output

So in short, you are using a single clock to perform a clocked output and the output you will build to satisfy your I2S protocol.

[nico]

Thanks for the link.
As far as I understand, this is the behaviour that I use in my current design based on USB slicekit with 1bit port.

But here is my problem :
- let's say that I have 8 words representing 8 values that I have to send to 8 i2s signals mapped on a 8bit port
- on the first clock edge, i need to send the first bit of each words on each data line
- on the second edge, the second bit, etc ...
- (i don't want to send the first byte of the first word on the 8bit port on the first clock edge ...)

So i need to "remap" 8 word of i2s signals on the right 8 word to put on the 8bit port

I am not sure that my explanations are clear ...

That must be possible but I wonder if there is already a piece of code that does that with some optimization.

[mon2]

Review the following document:

http://www.softio.com/xmos/xmos_i2s_8_streams.pdf

Your requirement is very common and possible with XMOS devices. The XMOS SDRAM IP is one example that uses this style of programming to the SDRAM IC. The I2S spec appears to be 3.5 Mhz max and XMOS can support this speed very easily. You will have to massage the data stream data to support the buffered port requirements which are also very quick to perform in C / XC language. If in a pinch, and you like some brain straining exercises, you can consider to bit twiddle the same tasks in assembler. There are some good posts on assembler use but personally would avoid unless absolutely necessary.

Assembler links:
https://www.xmos.com/published/how-use-inline-assembly

Personally liked this post:
http://www.xcore.com/blog/vinith/post/asm-examples

and
http://www.xcore.com/forum/viewtopic.ph ... =assembler

Summary: use a buffered port with a width of 32 bits and map to your 8 bit physical port.

With this setup, 8 bits of data will be automatically output onto the 8 bits then shift onto the next 8 bits, etc. till the 32 bit data is transmitted. You can dictate when the transactions are to start (ie. on which clock cycle) -> then reload the 32 bit register for another autonomous run of 32 bits. In the end, this dual run of 32 bit buffered data use will yield your 8 bit I2S output to 8 devices and will do so automatically on each clock cycle. XMOS is funky to learn and digest but review the above document we whipped up for you and see if it is logical.

Try the above by writing a simple program and just output 8 bits and then halt the program to confirm the results. Being a hardware designer, prefer to check the actual results on hardware but the simulator on the xTimeComposer tool should also be of use for this exercise.

Best to check against the XMOS official docs for any errors but care was taken during the writing of the document :)