Probably, this is not the first question about overflow,
but my search on the forum did not provide me enough certainty about the right anwser...
There is this example from Xmos Programming Guide about "Performing I/O on specific clock edges":
Code: Select all
void do_toggle ( out port p) {
int count ;
p <: 0 @ count ; // timestamped output
while (1) {
count += 3;
p @ count <: 1; // timed output
count += 2;
p @ count <: 0; // timed output
}
}
Why should count be a 32 bit signed integer instead of unsigned 16 bit short?A port has an internal 16-bit counter, which is incremented on each falling edge of
its clock.
Is it because of possible overflow on the 16 bit port counter?
But what happens when the port counter is reset due to overflow?
Will the clocked signal from the above example get a phase shift because of the port counter reset?
Thanks.