Multiple vendor JTAG devices

[jambun]

Hi, I am in the process of bringing up a prototype board with both an XE216-512-FB236 and an Altera Cyclone III EP3C5F256 in the JTAG chain. The Xmos part is first in the chain, the chain is functional and I have been able programme the Altera part. However when I try to connect to the XE216 part xTimeComposer halts with the following in the console:


The output from xrun shows:

Should this show 2 devices or does it just display the xmos parts.

To enable the Altera programmer to bypass the xmos part I had to enter details about the xmos part such as ID and register bit length, I have not found any documentation regarding bypassing other vender devices with the xmos tools.

By the way the link http://www.xmos.com/knowledgebase/tools is invalid.

Has anybody else tried this?

[mon2]

Hi. The following posts may help:

http://www.xcore.com/viewtopic.php?t=3419

http://www.xcore.com/viewtopic.php?t=3062

[jambun]

Hi mon2, Thanks for the suggestions but neither of those problem help, one is to do with xscope the other is an xmos device talking to an FPGA.

I do feel that there must be a way to define a "pass through" device in the XN file but I haven't found it yet.

Regards.

[mon2]

Hi.

1) this URL:

viewtopic.php?t=3419

offers details on the XTAG-2 output and their meaning.



O[0] means a network of 1 x O device. Each O device is a node (a switch) consisting of two tiles. On your device, each tile supports 8 threads (aka 8 logical cores).

"O" is the internal code name @ XMOS for XCORE-200. Sounds like that XTAG-2 is detecting your XCORE-200 CPU fine.

2) If you remove the XTAG-2 tool from your custom PCB, the XTAG-2 tool should fail to report this "O[0]" enumeration. Does it?

3) Code up a simple LED blinky program and try to upload to the SRAM of this custom PCB to execute. Does that work?

4) Can you post the relevant parts of the schematic for a review? XTAG-2 -> XMOS XE216 -> FPGA -> XTAG-2 chain.

5) In the event that the XTAG-2 fails to upload to your custom PCB, suggest to bypass the downstream FPGA to close the JTAG chain to be solely based on the XMOS CPU. Then test again. This must work first before introducing the FPGA.

[jambun]

Hi mon2,

2) Yes it does.

3) Tried that, same result. I am using this simple code for all testing.

4) Will do when I'm back at work.

5) Very hard to do this, both parts are BGA and the xmos part is near impossible to get at.

It would have been nice if the engineer who wrote the code for the debugger had given a little bit more information such as an error code, URLs are always a bad idea. At the moment I don't even know if it's a problem with my board the xtag2 or the debugging software.

I also have a feeling that the cable between the xtag and the board could be an issue so I'm going to reduce that to a minimum. I might also put some buffering between the two.

Thanks.

[mon2]

Hi.

1) Post your XN file for a review.

2) Believe you will need to make use of the XN JTAGDevice element inside your XN file. This element defines which JTAG component is first, which is second, etc.

https://www.xmos.com/support/tools/docu ... jtagdevice

3) Then index the device to programmed using the xflash tool. Suspecting that the xflash tool, after this chain definition will then place the preceding or trailing devices into JTAG bypass mode.

https://www.xmos.com/download/private/X ... 3274B).pdf

Do post the status of your testing and what works for you. On our pile of projects, we are planning to do something similar but using Lattice FPGA devices. We did code up a manual JTAG tool using the XMOS Startkit earlier this year and did manage to erase, program our Lattice bitstream.

The fpga4fun.com website is excellent for JTAG details and very well written.

http://www.fpga4fun.com/JTAG.html

4) XFLASH tool offers a parameter for the JTAG CLOCK value. Default is to run the JTAG tool @ 6 Mhz. You can slow it down. See page 3:

https://www.xmos.com/download/private/X ... 3274B).pdf

[jambun]

Hi mon2,

I couldn't access your private url, I didn't have the authority. However I have made some progress.

I tried uploading the image using 'xrun', this gave me the error 'Cannot load image, Xcore 0 is not enabled'. Searching on google returned a page from the xmos knowledgebase with a number of conditions that can cause this error. After going through all the usual checks such as power voltages and sequencing and reset timing I have now found that I have not applied power to OTP_VCC pins.

As the FB236 footprint is so fine I will not be able to go further with this particular board and will have to get it revised.

I cannot see any way to introduce a device from a different vendor in the XN file, all the elements appear to reference only xmos devices; however it does seem that the utilities are able to recognised foreign devices and bypass them automatically.

Thanks for your help

Stuart.

[mon2]

I couldn't access your private url, I didn't have the authority.

Sorry. Here is the public URL for the same document:

https://www.xmos.com/support/tools/docu ... ion=latest

As the FB236 footprint is so fine I will not be able to go further with this particular board and will have to get it revised.

That sucks.

however it does seem that the utilities are able to recognized foreign devices and bypass them automatically.

Did not know this but sounds like progress. Excellent.

Be sure of the power rail sequencing to be correct; proper current draw and support from the respective regulators for your widget.

Consider to apply bypass resistor networks to steer the JTAG chain onto your FPGA or back to the XTAG-3 tool (to index only the XMOS CPU) for the next PCB batch. These parts can assist to quickly debug the design. We place such (CYA) components all the time into our designs as Mr. Murphy has an office at our company.

Send us a private email if you need some affordable PCB suppliers from Shenzhen that are of very good quality for prototyping. JETPCB in Taiwan (they also have an office in the US now) is excellent and we have used them many times. Very high quality but they do charge a premium over others in China.

[jambun]

Hi mon2,
I have now reworked the PCB and all the hardware is working although I still have the issue with the JTAG. The Altera part is fine and can be detected and programmed with the XMOS device in the chain however the XMOS device will not play ball with the Altera device in the chain. Fortunatley I did as you suggested and placed a bypass link for the Altera device on the board.

I now have a bigger issue and that is the the speed of the xtcp library but that's another thread.

If you have any ideas for the JTAG I would welcome them as I'm not realy happy to have to move a link about on production boards.

Regards,
Stuart.

[mon2]

Happy Sunday Stuart. Sounds promising on the status of your revised PCB design.

1) Can you post the XN file used to access this new design? From our understanding, the secret to allow the XMOS device to be programmed in this JTAG chain lies inside the XN file definition. Also, to be clear, if you perform the Altera bypass using straps, the XMOS device is able to be accessed and can blink leds, etc. with your custom IP? Believe that is your current status.

2) Not required yet but the schematic showing the Altera and XMOS hookup may help.

Suspecting the fix will be in the XN file.