Hi,
The FB236 BGA package allows usage of the 32-bit port (compared with the TQ128 package), except that 32A22-32A25 are required for the QSPI flash interface D0-D3 (AKA 4B0-4B3). Presumably the GPIO library can be used to separate out the individual pins of the 32-bit port to allow these port lines to be used for the QSPI data I/O whilst allowing the other port lines to be used independently, does anyone have an example of how this is declared please?
Thanks,
Al
FB236 Package 32-Bit Port Usage Topic is solved
It's worth adding that 32A20-32A31 are shared with other ports, so I think it's a case of asking whether the GPIO library can be used to declare 32A0-32A19 as individual 1-bit port lines. Can anyone confirm this please?
Thanks!
Thanks!
Hi.
1) search out for a spreadsheet using "xmos port map"
2) no, the referenced port must be declared and used as a 32 bit port. However understand that only bit 0..19 of your I/O will physically be available on the port pins. The balance of the port has been multiplexed away so can not be used.
1) search out for a spreadsheet using "xmos port map"
2) no, the referenced port must be declared and used as a 32 bit port. However understand that only bit 0..19 of your I/O will physically be available on the port pins. The balance of the port has been multiplexed away so can not be used.
Thanks very much, I have the spreadsheet for the port maps, but both that and the XMOS Programming Guide are vague about overlapping ports, the latter only says 'Some pins map to multiple ports and, in general, overlapping ports should not be used together'. Is there any idea of precedence of port declarations, with those for lower bit width ports overriding those for high bit width ports? The spreadsheet only shows the affected pins as being not available when USB is enabled on that tile.
So from your description, it's really just a case of declaring the port as 32 bits wide, and doing a read or write using a 32-bit integer, but with 32A20-32A31 treated as Don't Cares.
So from your description, it's really just a case of declaring the port as 32 bits wide, and doing a read or write using a 32-bit integer, but with 32A20-32A31 treated as Don't Cares.
Hi. Correct on your understanding on how to treat this 32 bit port.
As with all XMOS CPUs, the priority is right to left. That is, if a smaller width declaration is used and available on this port map spreadsheet then the smaller width port will steal away those bits (due to higher priority).
See here for a detailed explanation:
https://www.xcore.com/viewtopic.php?f=26&t=6676
As with all XMOS CPUs, the priority is right to left. That is, if a smaller width declaration is used and available on this port map spreadsheet then the smaller width port will steal away those bits (due to higher priority).
See here for a detailed explanation:
https://www.xcore.com/viewtopic.php?f=26&t=6676
Thanks very much, a great explanation