‎XUF208 boot glitch

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tbjr6
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‎XUF208 boot glitch

Postby tbjr6 » Wed Feb 19, 2020 7:46 pm

I have a XUF208 installed on a custom pcb. On the first power up for the day it usually won't boot. Usually disconnecting and reconnecting power repeatedly will eventually get it to boot. Once it boots once, it will boot fine for the rest of the day by removing power or by driving the reset. I have checked the reset lines and manually asserted them with no luck. I have attached my schematic, although it does basically follow the reference design. Has anyone had a similar problem or know of any thing to possibly check?
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Caleb
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Postby Caleb » Wed Feb 19, 2020 10:39 pm

For this sort of problem, I first look at power supply sequencing. Board integration section of datasheet:
https://www.xmos.com/download/XUF208-25 ... (1.16).pdf
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mon2
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Postby mon2 » Thu Feb 20, 2020 6:18 am

OMG - now for sure I know that I need new glasses :)

How is this widget being powered? From the USB Vbus pin on a PC host?

Can you post a PDF version of your schematic so we can properly zoom in without distortion?

Monitor the #RESET pin upon power up and confirm the signal is LOW and then is released to a HIGH state for normal operation.

Check the soldering of all components which are often the root cause of such faults. The CPU pins and especially the metal belly pad on the device must be soldered.
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tbjr6
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Postby tbjr6 » Thu Feb 20, 2020 4:14 pm

Uploaded the wrong file, sorry.

I reviewed the board integration section of the datasheet when I designed it, but it couldn't hurt to go over it again, I also assumed the dev board had the power sequencing right so I didn't check into it too hard.

It is being powered via a SATA power connector. I will try watching the reset signal, that it is actually driven low by the reset monitors, although I have low hope for this as driving it manually to reset does not work. I have re-soldered it and re-flowed it, also using a different chip at one point, just to make sure it wasn't damaged.
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mon2
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Postby mon2 » Thu Feb 20, 2020 5:30 pm

Ok, this version of the schematic is much easier to review :)

Please post the full part number for the Si5351A PLL ( U18 ) & NCP303 ( U16 ).

Confirm that R103 for the PLLAVDD filter is indeed 4R7 = 4.7 ohms and not 4k7 (a common error seen on past reviews).

Confirm the voltage rails are correct as expected (+1v0; +3v3).

The 24Mhz clock fed into the XMOS CPU on pin 58 must be running. Do confirm this is the case. Due to the EN pin on the 24 Mhz oscillator, does not hurt to strap the EN pin High ("1") to guarantee that the oscillator Is running. We have seen cases where the internal weak pull-up resistor was not present during production which led to similar devices not clocking. Rare but have witnessed this event and the vendor was the factory in Taiwan who supplied FOX oscillators.
tbjr6
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Postby tbjr6 » Thu Feb 20, 2020 6:14 pm

SI5351A-B-GTR ‎
NCP303LSN30T1G
R103 is 4.7 Ohms
1.07V and 3.39V (with my uncalibrated cheapo multimeter)
The EN pin is strapped high with a 0 ohm resistor. That was put so I could inject a clock if necessary since this is a dev unit for us.
In all the probing it booted up, so I can't probe it again until tomorrow, but thank you for your help. If it happens again I will check that the 24M clock is actually working properly.
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mon2
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Postby mon2 » Thu Feb 20, 2020 6:37 pm

Hi. The referenced Silabs PLL is a generic factory blank PLL device. Is that what are you are expecting to use for your design?

Please do not confuse with the factory custom programmed device from XMOS with p/n Si5351A-B04486-GT. This specific p/n is a different animal and was programmed by Silabs on behalf of XMOS for audio project designs. The OTP inside the PLL which only the factory can program offers desirable clock values for audio widgets.

The datasheet for this specific p/n PLL is posted here:

viewtopic.php?f=37&t=7117&p=35180&hilit ... PLL#p35180

Aside from this important detail, you are free to use your own I2C master code to change the CLK outputs on this PLL.

The I2C source code to program this PLL to custom clock values is posted here:

viewtopic.php?t=4647&start=10

viewtopic.php?f=47&t=6662&p=33006&hilit ... kit#p33006
tbjr6
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Postby tbjr6 » Thu Feb 20, 2020 7:08 pm

Yes that is. I am using it to generate the MCLK, There is a chance with this to be running it at some weird sample rates, so I wanted it to be adjustable. I don't think there would be any issue with that as I have had i2s working with that as the driving clock.
Starson
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Postby Starson » Sat Feb 22, 2020 4:30 pm

Do you think this setup will work better than the one with the i2s?
tbjr6
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Postby tbjr6 » Mon Mar 09, 2020 5:48 pm

Starson wrote:
Sat Feb 22, 2020 4:30 pm
Do you think this setup will work better than the one with the i2s?
What do you mean? I am using this design to do i2s

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