XVF-3510 development and USB device

[Kevin Jordan]

Hi. Please follow the procedure shown in page 19 of the attached document to reflash the firmware onto your XMOS kit / custom PCB. Does this improve the programming of the firmware?

Didn't work. I feel like I'm chasing a hardware issue on my soldering job.

The command worked on my Dev Kit, but not on my Custom PCBA.
Dev Kit:

Code: Select all

bash-3.2$ xflash --list-devices --verbose
XFlash_Options::ListDevices : xgdb --batch -q --ex listdevices

Available XMOS Devices
----------------------

  ID	Name			Adapter ID	Devices
  --	----			----------	-------
  0 	XMOS XTAG-3         	2KbYj_za	O[0]

bash-3.2$ xflash --no-compression --boot-partition-size 1048576 --factory bin/app_xvf3510_ua_v4_0_0.xe --data data-partition/images/data_partition_factory_ua_v4_0_0.bin 
xflash: Warning: F03148 --quad-spi-clock not given, using default 15.62MHz
Site 0 has finished successfully.        
bash-3.2$ 

Custom PCBA:

Code: Select all

 
bash-3.2$ xflash --list-devices --verbose
XFlash_Options::ListDevices : xgdb --batch -q --ex listdevices

Available XMOS Devices
----------------------

  ID	Name			Adapter ID	Devices
  --	----			----------	-------
  0 	XMOS XTAG-3         	2KbYj_za	O[0]

bash-3.2$ xflash --no-compression --boot-partition-size 1048576 --factory bin/app_xvf3510_ua_v4_0_0.xe --data data-partition/images/data_partition_factory_ua_v4_0_0.bin --verbose
XFlash_Options::ListDevices : xgdb --batch -q --ex listdevices devl-1d6f994d
XFlash_Application found _start :40000 on Node 0
XFlash_Application found _DoSyscall :52190 on Node 0
XFlash_Application found _DoException :400a4 on Node 0
XFlash_Application found _start :40000 on Node 0
XFlash_Application found _DoSyscall :534cc on Node 0
XFlash_Application found _DoException :400a4 on Node 0
XFlash::DoXFlash
XFlash::DoImageProgramming
XFlash::GetDeviceInfo
XFlash_DeviceInfo::GetDeviceInfo_SQI
XFlash::BuildFlashBinaryFile
XFlash_Builder_S2L::BuildStage2Loaders Factory
xflash: Warning: F03148 --quad-spi-clock not given, using default 15.62MHz
Stage2_Loader::Compile : xcc -Wno-bidirectional-buffered-port -Xmapper --dontenablesodlinks -Xmapper --nochaninit -Xmapper --noinitialtidy -Xmapper --image-base -Xmapper 0x40080 -Xmapper --image-size -Xmapper 0x3ff80 -Xmapper --wno110 -Xmapper --wno226 -Xmapper --wnoXN -std=c99 -O2 -x xn "target-xn-v0-9eb2be6a" -x xc s2l-n0-ec88c794 -lstage2loader -lswitchsetup -lsqiaccess -lquadspi -llocks -o s2l-n0-419f5e1f
Stage2Loader found _DoSyscall : 0x404c8 on Node 0
Stage2Loader found _DoException : 0x40124 on Node 0
Stage2_SwitchSetup::Compile : xcc -c -march=xs2a -x assembler-with-cpp swstup-n0v0-f9a6042d -o swstup-n0v0-eff5692a
Stage2_SwitchSetup::Compile : xcc -nostartfiles -Wno-bidirectional-buffered-port -Xmapper --first -Xmapper swstup-n0v0-eff5692a -Xmapper --dontenablesodlinks -Xmapper --nochaninit -Xmapper --noinitialtidy -Xmapper --wno110 -Xmapper --wno226 -Xmapper --wnoXN -std=c99 -O2 -x xn "target-xn-v0-9eb2be6a" -x xc swstup-n0v0-8b0cdcb2 -lswitchsetup -o swstup-n0v0-f8e39802
XFlash_Builder_Image::BuildImages Factory
XFlash_Builder_Image::BuildImageTable
  master node = 0
    node = 0
XFlash_Builder_Image::BuildImageTable num cores for image table = 2
XFlash_Builder_Image::CalculateBufferSize Starting calculation _total_image_size=0
XFlash_Builder_Image::CalculateBufferSize Add Image Header _total_image_size=34
XFlash_Builder_Image::CalculateBufferSize Add Switch Setup header _total_image_size=3c
XFlash_Builder_Image::CalculateBufferSize Add Per Core header _total_image_size=54
XFlash_Builder_Image::CalculateBufferSize_SwitchSetup _total_image_size=7ac
XFlash_Builder_Image::CalculateBufferSize_Application application size = 161a4 _total_image_size = 16950
XFlash_Builder_Image::CalculateBufferSize_Application application size = 19ff4 _total_image_size = 30944
XFlash_Builder_Image::BuildImageTable allocated image buffer size = 30944
XFlash_Builder_Image::WriteBuffer_ImageHeader
XFlash_Builder_Image::WriteBuffer_SwitchSetup current switch setup table offset : 34
XFlash_Builder_Image::WriteBuffer_SwitchSetup current application data offset : 54
XFlash_Builder_Image::WriteBuffer_SwitchSetup size : 754
XFlash_Builder_Image::WriteBuffer_SwitchSetup aligned_size : 758
XFlash_Builder_Image::WriteBuffer_SwitchSetup init_vec_shift : 0
XFlash_Builder_Image::WriteBuffer_Application
XFlash_Builder_Image::WriteBuffer_Application for node : 0
XFlash_Builder_Image::WriteBuffer_Application for core : 0
XFlash_Builder_Image::WriteBuffer_Application current core table offset : 3c
XFlash_Builder_Image::WriteBuffer_Application current application data offset : 7ac
XFlash_Builder_Image::WriteBuffer_Application size : 161a0
XFlash_Builder_Image::WriteBuffer_Application aligned_size : 161a4
XFlash_Builder_Image::WriteBuffer_Application init_vec_shift : 0
XFlash_Builder_Image::WriteBuffer_Application chan end : 80020002
XFlash_Builder_Image::WriteBuffer_Application for core : 1
XFlash_Builder_Image::WriteBuffer_Application current core table offset : 48
XFlash_Builder_Image::WriteBuffer_Application current application data offset : 16950
XFlash_Builder_Image::WriteBuffer_Application size : 19ff0
XFlash_Builder_Image::WriteBuffer_Application aligned_size : 19ff4
XFlash_Builder_Image::WriteBuffer_Application init_vec_shift : 0
XFlash_Builder_Image::WriteBuffer_Application chan end : 80030002
XFlash_Builder_Image::WriteBuffer_CRC
XFlash_Builder_Binary::BuildBinary
XFlash_Builder_Binary::CalculateBufferSize_Factory
XFlash_Builder_Binary::CalculateBufferSize_Factory : Adding s2l size word (4)4
XFlash_Builder_Binary::CalculateBufferSize_Factory : Adding s2l app (1620) 1624
XFlash_Builder_Binary::CalculateBufferSize_Factory : Adding s2l crc (4)1628
XFlash_Builder_Binary::CalculateBufferSize_Factory : Adding factory app (30944) 31f6c
XFlash_Builder_Binary::CalculateBufferSize_Factory : Adding sector padding (94) 32000
XFlash_Builder_Binary::CalculateBufferSize_Factory : First User Sector offset = 32000
XFlash_Builder_Binary::GetSearchLimitPadding : current size (32000) ce000
XFlash_Builder_Binary::CalculateBufferSize_Data
XFlash_Builder_Binary::CalculateBufferSize_Data : Adding file data (3000) 103000
XFlash_Builder_Binary::BuildBinary : Allocating buffer - 103000
XFlash_Builder_Binary::GetSearchLimitPadding : current size (32000) ce000
XFlash_Builder_Binary::WriteBufferToBinary : flash_bin_node0
XFlash_Programmer_Program::DoProgram
XFlash_Programmer_Program::GenerateSource
XFlash_Programmer_Program::IssueCompileCommand :xcc -w -Xmapper --dontenablesodlinks -O2 -lquadspi -x xc "fp-293599fe" -x xn "target-xn-v0-9eb2be6a" -D VERBOSE=1 -D MONITOR=1 -D ERASE_ALL_FIRST=1 -o "fp-d9cc91eb"
XFlash_Utils::BuildRunCommand : xrun --io fp-d9cc91eb 
xrun: Cannot load image, XCore 0 is not enabled

Error: F03013 Failed to run : 0x7ffeed006610.
bash-3.2$ 

[mon2]

Fair enough, see here - still pointing to the possibility of the middle pad not being soldered properly. We have seen this issue with at least a few cases that have been reviewed for other OEMs.

https://github.com/introlab/16SoundsUSB/issues/6

xmos_no_work.png

Agree on your last post - time to warm up the soldering hot air gun and allow for that XMOS CPU to reflow again. We are using a hot air kit from BEST Tools in Shenzhen - amazing device and was under $300 USD with DHL delivery. Can crank upto 550 C so it is perfect for the heavy ground plane rework of Apple motherboards, etc.

You may want to lean on the PCB house to x-ray the device but sounds like a soldering issue at this time.

[mon2]

One more thing :) Piecing together your assembly process, you are ordering the PCB and PCBA services from JLCPCB.COM (less the XMOS CPU)? Then you manually solder in the XMOS XVF3510 CPU? We know and use JLCPCB for our low density designs and they are a good fit. Met them a few times in HK at past trade fairs.

During your soldering of the XMOS CPU - highly recommend the use of the AMTECH (or clone) TACKY FLUX. That stuff is magic. Apply some on before placing your CPU -> hot air the flux to make the flux a clear liquid and then seat the CPU and solder away.

You can source from Amazon but a fraction of the cost on Aliexpress - picked up 5 tubes for around $10 USD with free shipping. Clone or not, it works well !!

[Kevin Jordan]

One more thing :) Piecing together your assembly process, you are ordering the PCB and PCBA services from JLCPCB.COM (less the XMOS CPU)? Then you manually solder in the XMOS XVF3510 CPU? We know and use JLCPCB for our low density designs and they are a good fit. Met them a few times in HK at past trade fairs.

Yup, this is exactly what I'm doing. JLCPCB is putting down all the Passives and some ICs, then I'm putting down the big Caps, the Inductor and XMOS QFN chip. Ideally, I'd have a fab do everything, but they were all going to take several weeks and I wanted to try out the design quicker than that.

During your soldering of the XMOS CPU - highly recommend the use of the AMTECH (or clone) TACKY FLUX. That stuff is magic. Apply some on before placing your CPU -> hot air the flux to make the flux a clear liquid and then seat the CPU and solder away.

You can source from Amazon but a fraction of the cost on Aliexpress - picked up 5 tubes for around $10 USD with free shipping. Clone or not, it works well !!

I'm going to order some and give it a try.

[Kevin Jordan]

Fair enough, see here - still pointing to the possibility of the middle pad not being soldered properly. We have seen this issue with at least a few cases that have been reviewed for other OEMs.

https://github.com/introlab/16SoundsUSB/issues/6


xmos_no_work.png

Agree on your last post - time to warm up the soldering hot air gun and allow for that XMOS CPU to reflow again. We are using a hot air kit from BEST Tools in Shenzhen - amazing device and was under $300 USD with DHL delivery. Can crank upto 550 C so it is perfect for the heavy ground plane rework of Apple motherboards, etc.

You may want to lean on the PCB house to x-ray the device but sounds like a soldering issue at this time.

I've got a hot air station that can get up to 500C, but I've only been running it to 310C and things seem to have set pretty well. I'll try upping the temp to 400+ and giving it a try.

[Kevin Jordan]

Attached is my startup of 3v3, 1v0, and the Reset Pin.

Screen Shot 2020-08-14 at 9.07.22 AM.png

Purple is the 3v3, Yellow the 1v0, and Blue is the RESET.

This is the sequencing of the Dev Kit.

Screen Shot 2020-08-14 at 9.45.55 AM.png

Purple is the 3v3, Yellow the 1v0, and Blue is the RESET.


The only difference is that the 1v0 turns on a few ms after the 3v3. I'll delay my 1v0 to match this startup sequence.

[mon2]

1) Have you applied the external 4k7 pull-down resistor on the D1 pin #2 of the QSPI flash? It is required to force the XMOS CPU to read this logic low value upon a power up -> configure as the QSPI Bus master. Only then, will the QSPI CLK pin start to oscillate.

2) After the above, what is the voltage swing on the QSPI CLK pin #6 of the flash IC? This value should not be higher than +3v3 to match the voltage being fed into the VIO rails by your local +3v3 regulator.

3) Confirm that the 24mhz clock is operating correctly on pin # 56 of the XMOS CPU and also the X1 oscillator @ X1, pin 3. We have seen similar oscillators where Pin #1 on the oscillator is the ENABLE / DISABLE pin. It is NOT a good idea to leave pin # 1 floating on such devices. The reason being that the vendor inserts a local pull-up resistor inside the package but we have seen cases where this internal resistor was not working so the oscillator remained OFF. A pain to fix after the fact. Just strap pin # 1 of the oscillator always to +3v3 to force this condition to be TRUE. Without a working clock on the XMOS CPU - the design will not work.

4) You power rail power up sequence looks to be ok.

5) Can you repeat the programming of the external flash with the XMOS official kit but apply the --verbose flag? Will be good to compare against the non-working PCB.

6) Continue your testing but if it helps and you have a spare PCB & CPU, you can send to us for a quick review. We are in Windsor, Ontario, Canada. However, I think you are very very close to getting this to work.

[mon2]

Ok, well the docs state that the QSPI default is QSPI Bus master if the external resistor is missing. So perhaps this is not the issue. Personally would still apply it to be 100% sure the XMOS CPU can read a logic LOW upon a #RESET release.

xmos_qspi_floating_default.png

Interested to know if your external clock source is oscillating.

[Kevin Jordan]

1) Have you applied the external 4k7 pull-down resistor on the D1 pin #2 of the QSPI flash? It is required to force the XMOS CPU to read this logic low value upon a power up -> configure as the QSPI Bus master. Only then, will the QSPI CLK pin start to oscillate.

I used a 3.8k resistor (couldn't find a 4.7k) to pull down pin 2 on the QSPI flash, and it didn't seem to do anything, and the QSPI CLK pin didn't start oscillating. I tried pulling the pin up to 3v3 with the 3.8k resistor, and same thing, nothing.

2) After the above, what is the voltage swing on the QSPI CLK pin #6 of the flash IC? This value should not be higher than +3v3 to match the voltage being fed into the VIO rails by your local +3v3 regulator.

I'm measuring ~500mV with my Rigol Scope, and 3.6v with my Fluke on Pin #6, which is weird to me.

3) Confirm that the 24mhz clock is operating correctly on pin # 56 of the XMOS CPU and also the X1 oscillator @ X1, pin 3. We have seen similar oscillators where Pin #1 on the oscillator is the ENABLE / DISABLE pin. It is NOT a good idea to leave pin # 1 floating on such devices. The reason being that the vendor inserts a local pull-up resistor inside the package but we have seen cases where this internal resistor was not working so the oscillator remained OFF. A pain to fix after the fact. Just strap pin # 1 of the oscillator always to +3v3 to force this condition to be TRUE. Without a working clock on the XMOS CPU - the design will not work.

24 MHz clock is definitely running. I connected to my R32 on my board, and R10 on the dev board, and both showed pretty much the same oscillating.

My PCB @24MHz

Screen Shot 2020-08-14 at 3.57.00 PM.png

DevKit's 24MHz

Screen Shot 2020-08-14 at 3.57.11 PM.png

On the next spin, I'll bring Pin 1 to 3v3 for the Oscillator

4) You power rail power up sequence looks to be ok.

I blue wired the 1v0 enable pin over to the 3v3 output, and I'm slowly turning on my bench supply for the 5v rail, and it connects to the computer with --list-devices almost every time now. I no longer need to pull the reset to ground to make the computer connect.

5) Can you repeat the programming of the external flash with the XMOS official kit but apply the --verbose flag? Will be good to compare against the non-working PCB.

Here is the the verbose output flashing the devkit:

Code: Select all

bash-3.2$ xflash --list-devices --verbose
XFlash_Options::ListDevices : xgdb --batch -q --ex listdevices

Available XMOS Devices
----------------------

  ID	Name			Adapter ID	Devices
  --	----			----------	-------
  0 	XMOS XTAG-3         	2KbYj_za	O[0]

bash-3.2$ xflash --no-compression --boot-partition-size 1048576 --factory bin/app_xvf3510_ua_v4_0_0.xe --data data-partition/images/data_partition_factory_ua_v4_0_0.bin --verbose
XFlash_Options::ListDevices : xgdb --batch -q --ex listdevices devl-a8d82e72
XFlash_Application found _start :40000 on Node 0
XFlash_Application found _DoSyscall :52190 on Node 0
XFlash_Application found _DoException :400a4 on Node 0
XFlash_Application found _start :40000 on Node 0
XFlash_Application found _DoSyscall :534cc on Node 0
XFlash_Application found _DoException :400a4 on Node 0
XFlash::DoXFlash
XFlash::DoImageProgramming
XFlash::GetDeviceInfo
XFlash_DeviceInfo::GetDeviceInfo_SQI
XFlash::BuildFlashBinaryFile
XFlash_Builder_S2L::BuildStage2Loaders Factory
xflash: Warning: F03148 --quad-spi-clock not given, using default 15.62MHz
Stage2_Loader::Compile : xcc -Wno-bidirectional-buffered-port -Xmapper --dontenablesodlinks -Xmapper --nochaninit -Xmapper --noinitialtidy -Xmapper --image-base -Xmapper 0x40080 -Xmapper --image-size -Xmapper 0x3ff80 -Xmapper --wno110 -Xmapper --wno226 -Xmapper --wnoXN -std=c99 -O2 -x xn "target-xn-v0-54cea7b3" -x xc s2l-n0-0ee59adb -lstage2loader -lswitchsetup -lsqiaccess -lquadspi -llocks -o s2l-n0-415f5144
Stage2Loader found _DoSyscall : 0x404c8 on Node 0
Stage2Loader found _DoException : 0x40124 on Node 0
Stage2_SwitchSetup::Compile : xcc -c -march=xs2a -x assembler-with-cpp swstup-n0v0-751a699a -o swstup-n0v0-d681d268
Stage2_SwitchSetup::Compile : xcc -nostartfiles -Wno-bidirectional-buffered-port -Xmapper --first -Xmapper swstup-n0v0-d681d268 -Xmapper --dontenablesodlinks -Xmapper --nochaninit -Xmapper --noinitialtidy -Xmapper --wno110 -Xmapper --wno226 -Xmapper --wnoXN -std=c99 -O2 -x xn "target-xn-v0-54cea7b3" -x xc swstup-n0v0-98ec36e4 -lswitchsetup -o swstup-n0v0-cd4947bf
XFlash_Builder_Image::BuildImages Factory
XFlash_Builder_Image::BuildImageTable
  master node = 0
    node = 0
XFlash_Builder_Image::BuildImageTable num cores for image table = 2
XFlash_Builder_Image::CalculateBufferSize Starting calculation _total_image_size=0
XFlash_Builder_Image::CalculateBufferSize Add Image Header _total_image_size=34
XFlash_Builder_Image::CalculateBufferSize Add Switch Setup header _total_image_size=3c
XFlash_Builder_Image::CalculateBufferSize Add Per Core header _total_image_size=54
XFlash_Builder_Image::CalculateBufferSize_SwitchSetup _total_image_size=7ac
XFlash_Builder_Image::CalculateBufferSize_Application application size = 161a4 _total_image_size = 16950
XFlash_Builder_Image::CalculateBufferSize_Application application size = 19ff4 _total_image_size = 30944
XFlash_Builder_Image::BuildImageTable allocated image buffer size = 30944
XFlash_Builder_Image::WriteBuffer_ImageHeader
XFlash_Builder_Image::WriteBuffer_SwitchSetup current switch setup table offset : 34
XFlash_Builder_Image::WriteBuffer_SwitchSetup current application data offset : 54
XFlash_Builder_Image::WriteBuffer_SwitchSetup size : 754
XFlash_Builder_Image::WriteBuffer_SwitchSetup aligned_size : 758
XFlash_Builder_Image::WriteBuffer_SwitchSetup init_vec_shift : 0
XFlash_Builder_Image::WriteBuffer_Application
XFlash_Builder_Image::WriteBuffer_Application for node : 0
XFlash_Builder_Image::WriteBuffer_Application for core : 0
XFlash_Builder_Image::WriteBuffer_Application current core table offset : 3c
XFlash_Builder_Image::WriteBuffer_Application current application data offset : 7ac
XFlash_Builder_Image::WriteBuffer_Application size : 161a0
XFlash_Builder_Image::WriteBuffer_Application aligned_size : 161a4
XFlash_Builder_Image::WriteBuffer_Application init_vec_shift : 0
XFlash_Builder_Image::WriteBuffer_Application chan end : 80020002
XFlash_Builder_Image::WriteBuffer_Application for core : 1
XFlash_Builder_Image::WriteBuffer_Application current core table offset : 48
XFlash_Builder_Image::WriteBuffer_Application current application data offset : 16950
XFlash_Builder_Image::WriteBuffer_Application size : 19ff0
XFlash_Builder_Image::WriteBuffer_Application aligned_size : 19ff4
XFlash_Builder_Image::WriteBuffer_Application init_vec_shift : 0
XFlash_Builder_Image::WriteBuffer_Application chan end : 80030002
XFlash_Builder_Image::WriteBuffer_CRC
XFlash_Builder_Binary::BuildBinary
XFlash_Builder_Binary::CalculateBufferSize_Factory
XFlash_Builder_Binary::CalculateBufferSize_Factory : Adding s2l size word (4)4
XFlash_Builder_Binary::CalculateBufferSize_Factory : Adding s2l app (1620) 1624
XFlash_Builder_Binary::CalculateBufferSize_Factory : Adding s2l crc (4)1628
XFlash_Builder_Binary::CalculateBufferSize_Factory : Adding factory app (30944) 31f6c
XFlash_Builder_Binary::CalculateBufferSize_Factory : Adding sector padding (94) 32000
XFlash_Builder_Binary::CalculateBufferSize_Factory : First User Sector offset = 32000
XFlash_Builder_Binary::GetSearchLimitPadding : current size (32000) ce000
XFlash_Builder_Binary::CalculateBufferSize_Data
XFlash_Builder_Binary::CalculateBufferSize_Data : Adding file data (3000) 103000
XFlash_Builder_Binary::BuildBinary : Allocating buffer - 103000
XFlash_Builder_Binary::GetSearchLimitPadding : current size (32000) ce000
XFlash_Builder_Binary::WriteBufferToBinary : flash_bin_node0
XFlash_Programmer_Program::DoProgram
XFlash_Programmer_Program::GenerateSource
XFlash_Programmer_Program::IssueCompileCommand :xcc -w -Xmapper --dontenablesodlinks -O2 -lquadspi -x xc "fp-cb92117f" -x xn "target-xn-v0-54cea7b3" -D VERBOSE=1 -D MONITOR=1 -D ERASE_ALL_FIRST=1 -o "fp-832159d4"
XFlash_Utils::BuildRunCommand : xrun --io fp-832159d4 
Site 0 has finished successfully.        
XFlash_Programmer_Program::IssueResetCommand : xgdb --batch-silent --ex connect --ex reset mode-pins nointerrupt --ex q 

6) Continue your testing but if it helps and you have a spare PCB & CPU, you can send to us for a quick review. We are in Windsor, Ontario, Canada. However, I think you are very very close to getting this to work.

I definitely might take you up on this. It will probably be after my next spin.

[mon2]

Hi. Can you check the voltage powering your 24 MHz oscillator?

The output voltage swing looks much higher than the XMOS kit ref clock.

I think you are using the 5 volt rail for the oscillator?

This clock must be a 3v3 powered cmos clock else may damage the XMOS CPU. The XMOS CPU is not 5 volt tolerant.