Hello,
I'm trying to port the SPDIF to I2S with ASRC project on a custom hw (AN00231).
The custom hw is based upon an XUF208 ic, the hw works well with the audio usb project, playing audio from USB, no problem.
My port for AN00231 on my hw almost works, but there is something wrong, I join some scope shoot to explain issue (fw hang every 100ms), the probe is connected after the dac.
The console in Xtime composer studio shows multiple detections of of rate change, and finnaly ends with en error:
ew rate in SRC in=0, out=1
New rate in SRC in=0, out=1
New rate in SRC in=0, out=1
New rate in SRC in=0, out=1
New rate in SRC in=0, out=1
New rate in SRC in=57005, out=57005
ASRC_proc Error code 11
When I probe signal from Xmos to DAC, I saw data and every 100ms the loose of signals, which is perfectly repoduced by DAC (a TI PCM1792).
I probe signals from toslink and everything looks great, fast rising/falling time (my 100mhz bandwidth scope show a 20ns for rise/up), so the Xmos is feed with clean digital signal.
I test toslink link with a another amplifer: works great
I'm a little bit desperated about this issue because I really don't have idea from where this come. I have difficult to interpret the 'ASRC_proc_Error code 11', I suspect the rate manager don't work properly because it changes every 100ms rate and on the signal generator side there is no change of signal. But I really don't understand what is going on.
I try fw modifications: supressions of I2C communication in the codec task, suppressions of leds&button task, no change.
I'm feeling like a spammer with all my questions and 0 answer, then it will be the last I will post if nobody can help, Xmos seduced me at the begining and I build my prototypes with Xmos IC, maybe I should gone with china IC, maybe I should accept to buy a new prototype with another way for dac/usb/spdif.
Anyway thanks to people (mon2) on the forum who greatly helped me with my basic issues and questions.
USB Audio framework spdif to i2s issue
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Hehe you can wait here for an answer like me waiting for parts from xmos. A mess.
Please have a look and resolder all pins and check if you have all clocks and voltages running. Maybe you have a cold pin.
I wonder you have defined #define XUD_TILE 0 should it not on Tile 1.
You have redefined the SPDIF input check if you have it on the right audio tile ( ) .Please check gpio_access too.
I can't find define SPDIF_RX(1) somewhere.
Please check if you need mclk 22..24.. running on the xmos.
In the next weeks i am working on the same approach but i want to use an xmos input pin and the xmos reset to reboot it to decode USB->I2S or SPDIF-> I2S
i wanna just disable the usb enumeration if input is high . How it works ? I dont know and care ;)
An open xmos adventure.
Best regards
Andy
Please have a look and resolder all pins and check if you have all clocks and voltages running. Maybe you have a cold pin.
I wonder you have defined #define XUD_TILE 0 should it not on Tile 1.
You have redefined the SPDIF input check if you have it on the right audio tile ( ) .Please check gpio_access too.
I can't find define SPDIF_RX(1) somewhere.
Please check if you need mclk 22..24.. running on the xmos.
In the next weeks i am working on the same approach but i want to use an xmos input pin and the xmos reset to reboot it to decode USB->I2S or SPDIF-> I2S
i wanna just disable the usb enumeration if input is high . How it works ? I dont know and care ;)
An open xmos adventure.
Best regards
Andy
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At least I'm feeling less alone with your answer :)
I'w working on exactly the same approach that you will do, an xmos inbput pin controlled by external mcu and play with reboot pin to start xmos in USB=>I2S or SPIDF=>I2S.
For that using AN00109 'Multiple firmware booting' shoud help.
I initially wanted use only xmos usb audio framework to made both mode (USB->I2S or SPDIF->I2S) but finally because I don't manage to get SPDIF->I2S working I work on another approach:
I use xmos USB audio framework to make the USB->I2S firmware and the AN00231 'SPDIF to I2S using ASRC' to make the SPDIF->I2S firmware.
Advantage using AN00231 instead of usb audio framework are:
At least it almost work :) I have issues described above but at least the is something on the DAC
I save the CS2100 expensive PLL with AN00231
This is why you won't find SPDIF_RX(1) in the code posted above because it is based on AN00231 and not usb audio framework.
If you choose same approach (usb audio framework for usb and an00231 for spdif) will be interested in to know if you successfull make an00231 work on your design. Off course if finally I get an00231 working on my design will share how know contents.
At least I can share you my schematics, this shematic is working with XUF208 for USB->SPDIF. You will have PSU management, DAC side and Xmos implementation. For SPDIF->I2S it almost work but the code hang every 100ms and restart.
I have only one Xmos chip remaining, then can build only one more prototype :/ at least I have already working prototype hope xmos availlability on digi/mouser/newark will get soon again
I'w working on exactly the same approach that you will do, an xmos inbput pin controlled by external mcu and play with reboot pin to start xmos in USB=>I2S or SPIDF=>I2S.
For that using AN00109 'Multiple firmware booting' shoud help.
I initially wanted use only xmos usb audio framework to made both mode (USB->I2S or SPDIF->I2S) but finally because I don't manage to get SPDIF->I2S working I work on another approach:
I use xmos USB audio framework to make the USB->I2S firmware and the AN00231 'SPDIF to I2S using ASRC' to make the SPDIF->I2S firmware.
Advantage using AN00231 instead of usb audio framework are:
At least it almost work :) I have issues described above but at least the is something on the DAC
I save the CS2100 expensive PLL with AN00231
This is why you won't find SPDIF_RX(1) in the code posted above because it is based on AN00231 and not usb audio framework.
If you choose same approach (usb audio framework for usb and an00231 for spdif) will be interested in to know if you successfull make an00231 work on your design. Off course if finally I get an00231 working on my design will share how know contents.
At least I can share you my schematics, this shematic is working with XUF208 for USB->SPDIF. You will have PSU management, DAC side and Xmos implementation. For SPDIF->I2S it almost work but the code hang every 100ms and restart.
I have only one Xmos chip remaining, then can build only one more prototype :/ at least I have already working prototype hope xmos availlability on digi/mouser/newark will get soon again
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Hello,
I try to run my XUF208-256-TQ64-C10 @ 400Mz instead of 500Mhz (changing frequency in xn config file) and now the spdif sample rate is correctly detected:
Starting I2S
SR change in lib_audio_codec - 48000
Initializing I2S to 48000Hz and MCLK to 24576000Hz
spdif rate ave=48001, valid=1, i2s rate=47067, valid=0, i2s_buff=14, fs_ratio=0x10000000, nom_fs=0x10000000
spdif rate ave=48001, valid=1, i2s rate=47072, valid=0, i2s_buff=18, fs_ratio=0x10000000, nom_fs=0x10000000
But there is a problem with I2S which can't go to 48000. I try also with 44100 sample rate ans result is similar: spdif sample rate correctly detected but i2s sample rate too low (around 43750).
I look on power supply side to see if there is any issue when runing @500mhz and i didn't see any glitch in vcore rail and 3.3 V also.
When I switch back to 500Mhz the console show me a lot of 'New rate in SRC in=1, out=1' just like that:
Starting I2S
SR change in lib_audio_codec - 48000
Initializing I2S to 48000Hz and MCLK to 24576000Hz
New rate in SRC in=1, out=1
New rate in SRC in=1, out=1
New rate in SRC in=1, out=1
New rate in SRC in=1, out=1
New rate in SRC in=1, out=1
Lines 'New rate in SRC....' come very fast, maybe one line each 100ms.
Again switching back to 400Mhz, the firmware seems to work properly with the line 'spdif rate ave=......' evey 5s but there is a issue on i2s wich can't go to desired sampe rate.
The HW works properly with usb audio framework to playback from USB @ 500mhz, then my oscillator works properly.
I suspect something wrong in the hardware config file (xn) but don't found. Full project is posted above.
I try to run my XUF208-256-TQ64-C10 @ 400Mz instead of 500Mhz (changing frequency in xn config file) and now the spdif sample rate is correctly detected:
Starting I2S
SR change in lib_audio_codec - 48000
Initializing I2S to 48000Hz and MCLK to 24576000Hz
spdif rate ave=48001, valid=1, i2s rate=47067, valid=0, i2s_buff=14, fs_ratio=0x10000000, nom_fs=0x10000000
spdif rate ave=48001, valid=1, i2s rate=47072, valid=0, i2s_buff=18, fs_ratio=0x10000000, nom_fs=0x10000000
But there is a problem with I2S which can't go to 48000. I try also with 44100 sample rate ans result is similar: spdif sample rate correctly detected but i2s sample rate too low (around 43750).
I look on power supply side to see if there is any issue when runing @500mhz and i didn't see any glitch in vcore rail and 3.3 V also.
When I switch back to 500Mhz the console show me a lot of 'New rate in SRC in=1, out=1' just like that:
Starting I2S
SR change in lib_audio_codec - 48000
Initializing I2S to 48000Hz and MCLK to 24576000Hz
New rate in SRC in=1, out=1
New rate in SRC in=1, out=1
New rate in SRC in=1, out=1
New rate in SRC in=1, out=1
New rate in SRC in=1, out=1
Lines 'New rate in SRC....' come very fast, maybe one line each 100ms.
Again switching back to 400Mhz, the firmware seems to work properly with the line 'spdif rate ave=......' evey 5s but there is a issue on i2s wich can't go to desired sampe rate.
The HW works properly with usb audio framework to playback from USB @ 500mhz, then my oscillator works properly.
I suspect something wrong in the hardware config file (xn) but don't found. Full project is posted above.
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Hi,
it seems that you have a clocking issue. Please remove Ferrite Bead FB601 and replace it with an 4R7/10R resistor for better pll voltage filtering. Remove the 10uF C609 too.
You need a stabe 24.0 Mhz clock on the xmos at any time. Please check.
I use an XU216 but that doesnt matter because spdif is just a state machine should run well. Try using the multichannel app_usb_aud.....project instead because for my taste its better using the usb and spdif solution from xmos together in one project.
Design looks good but consider removing the PGA. It will add noise and distortion. Use the PCM DAC vol control.There is nothing wrong with it. If you need volume control for U404 add the PGA just after the op amps U404. Make the gain adjustable to fit with the PCM output. You can use thin transformer wire for a quick test. Use 4n7 COG.
Sorry for my late replys.
Regards
Andy
it seems that you have a clocking issue. Please remove Ferrite Bead FB601 and replace it with an 4R7/10R resistor for better pll voltage filtering. Remove the 10uF C609 too.
You need a stabe 24.0 Mhz clock on the xmos at any time. Please check.
I use an XU216 but that doesnt matter because spdif is just a state machine should run well. Try using the multichannel app_usb_aud.....project instead because for my taste its better using the usb and spdif solution from xmos together in one project.
Design looks good but consider removing the PGA. It will add noise and distortion. Use the PCM DAC vol control.There is nothing wrong with it. If you need volume control for U404 add the PGA just after the op amps U404. Make the gain adjustable to fit with the PCM output. You can use thin transformer wire for a quick test. Use 4n7 COG.
Sorry for my late replys.
Regards
Andy
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Hi Biquad,
Thanks for your advices.
I use a 4R7 resistor instead of ferrite, also I remove the 10uF cap C609.
I use usb audio framework which works great on my design to check clock stability, I see no issue. I share some scope shoot with the signal DAC_LRCLK (441_usb) with usb audio framework running. Scope is in persistant mode to see if there is any issue with signal and the signal is good no suprise usb audio framework works like a charm on my pcba.
Then I run spdif to i2s an00231 on my pcba and the signals DAC_LRCLK is full of glitch and jitter, there is an issue here. Look at shared 48_spdif shoot.
Still with an00231 runing I take a look on signals 24M_CLK and AUDIO_CLK ( signals looks good without any glitch/jitter (scope always in persistant mode). Those signals are not well squared but this is due to my scope limited BW (100Mhz) and the probe I use to made the measure (to leasy to solder a coax on the pcba I use standard scope probe), so the not squared look on signals are normal thing.
I think about an issue with my makefile, maybe this is not good for an X2S device and I should told compiler this is an X2S device despite there is mention of X2S in XN file ? I suspect an config/fw issue rather than HW.
Relative to SPDIF to I2S with usb audio framework and hw extern PLL CS2100 I never succeded get it working, to be honest I'm newbie in firmware programing and usage, my skill are on the hw analog side. So for simple MCU (like stm32 I also use on this project) I'm suceesfully get working freertos and multiple simple task, but Xmos framework is a big deal for me. Also I don't work for any company on this project it's a homemade prototype run for maybe a future company, that's why I'm insisting on forum, cause it's the only help I have and I really appreciate to have it.
Your suggestion about PGA make sense, I initially thounk that running DAC at 100% volume and after modulate volume in an analog way will give less noise/distorsion, this is one of the test (modulate volume in digital domain or analog domain) I will have to do once I buy a QA402 THD analyser :).
All ceramics relative to audio path are C0G type.
Best Regards,
Florian
Thanks for your advices.
I use a 4R7 resistor instead of ferrite, also I remove the 10uF cap C609.
I use usb audio framework which works great on my design to check clock stability, I see no issue. I share some scope shoot with the signal DAC_LRCLK (441_usb) with usb audio framework running. Scope is in persistant mode to see if there is any issue with signal and the signal is good no suprise usb audio framework works like a charm on my pcba.
Then I run spdif to i2s an00231 on my pcba and the signals DAC_LRCLK is full of glitch and jitter, there is an issue here. Look at shared 48_spdif shoot.
Still with an00231 runing I take a look on signals 24M_CLK and AUDIO_CLK ( signals looks good without any glitch/jitter (scope always in persistant mode). Those signals are not well squared but this is due to my scope limited BW (100Mhz) and the probe I use to made the measure (to leasy to solder a coax on the pcba I use standard scope probe), so the not squared look on signals are normal thing.
I think about an issue with my makefile, maybe this is not good for an X2S device and I should told compiler this is an X2S device despite there is mention of X2S in XN file ? I suspect an config/fw issue rather than HW.
Relative to SPDIF to I2S with usb audio framework and hw extern PLL CS2100 I never succeded get it working, to be honest I'm newbie in firmware programing and usage, my skill are on the hw analog side. So for simple MCU (like stm32 I also use on this project) I'm suceesfully get working freertos and multiple simple task, but Xmos framework is a big deal for me. Also I don't work for any company on this project it's a homemade prototype run for maybe a future company, that's why I'm insisting on forum, cause it's the only help I have and I really appreciate to have it.
Your suggestion about PGA make sense, I initially thounk that running DAC at 100% volume and after modulate volume in an analog way will give less noise/distorsion, this is one of the test (modulate volume in digital domain or analog domain) I will have to do once I buy a QA402 THD analyser :).
All ceramics relative to audio path are C0G type.
Best Regards,
Florian
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Here the scope shoot relative to 24Mhz clock and audio clock provided both by pll PL611 (design from Xmos usb audio multichanel ref design).
Also my project which seems to be buggy (based on an00231 modified for my use especially with dac section and config file cause I use an XUF208 device).
Also my project which seems to be buggy (based on an00231 modified for my use especially with dac section and config file cause I use an XUF208 device).
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Hi Florian,
remove the PGA it will make it more worse. Then add a second OPA to the U404 and invert the output. You have the benifit of unbal to balanced analog inputs.
Please use a long cap wire and wrap it around the top probe tip ground. You need shorter probe grounds to measure 24 Mhz.
I am out. Its too stupid implementing xmos half backed modules with mini examples regarding 216 projects.
I will use an spdif receiver ic and switch it to the I2S lines with the goal to have more options. It makes no sense to me investing more time.
Xmos is to busy carving ics out of wood ;)
Best regards
Andy
remove the PGA it will make it more worse. Then add a second OPA to the U404 and invert the output. You have the benifit of unbal to balanced analog inputs.
Please use a long cap wire and wrap it around the top probe tip ground. You need shorter probe grounds to measure 24 Mhz.
I am out. Its too stupid implementing xmos half backed modules with mini examples regarding 216 projects.
I will use an spdif receiver ic and switch it to the I2S lines with the goal to have more options. It makes no sense to me investing more time.
Xmos is to busy carving ics out of wood ;)
Best regards
Andy
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Hi Andy,
Yep, I will measure thd+n with and without pga in order to choose if I keep it or not, one time I will have a thd+n analyser. Anyway using PGA only for my analog line IN will save me some cost as 2 ch PGA is less expensive than the 4 ch I use today, but as I've a lot of difficulties to manage simple task like made working an00231 I doubt I can easily get a software volume control inside Xmos easily.
For 24M measure, I espect despite my poor quality measure setup, if there is any jitter here my setup can show me, and I see no jitter here, then I espect my clocking sheme works well (also the fact the usb audio framework works great tend to a well working clocking scheme). A clean setup will be to solder a coaxial cable like rg178 directly to the board.
Today I do a unbal to bal conversion with U404 and U405/U406. In fact U404 are just here as a current buffer because unbal to bal circuitry with U405/U406 draw some mA due to low value resistors used here. This schematic is a little bit unusual for a I/V typical application because I stay in balanced mode (also for the DAC output), looking at this U405/U406 are used for:
*cancel offset voltage from U401/U403 when relays K401/K402 are in DAC mode
*made unbal to bal conversion when relays are in analog line mode
U405/U406 are not typical single ended voltage opamp, they are differential input amplifier.
The power section of the amp is made of two amplifiers for each channel in a fully differential scheme, that's why I need balanced mode for audio low level analog just before power amp.
I stay in, I read on this forum that using an00231 spdif to i2s with asrc is normally a easy step, I understand you rather prefer going with a spdif receiver ic and manage with i2s signals. Will continue to trying make working this feature, in case of success this will save me an spdif receiver ic and I'm looking for cost killing.
Hope Xmos will have soon a manufacturing timeslot to flood all digikey/newark/mouser vendors with lots of silicons :)
Best Regards,
Florian
Yep, I will measure thd+n with and without pga in order to choose if I keep it or not, one time I will have a thd+n analyser. Anyway using PGA only for my analog line IN will save me some cost as 2 ch PGA is less expensive than the 4 ch I use today, but as I've a lot of difficulties to manage simple task like made working an00231 I doubt I can easily get a software volume control inside Xmos easily.
For 24M measure, I espect despite my poor quality measure setup, if there is any jitter here my setup can show me, and I see no jitter here, then I espect my clocking sheme works well (also the fact the usb audio framework works great tend to a well working clocking scheme). A clean setup will be to solder a coaxial cable like rg178 directly to the board.
Today I do a unbal to bal conversion with U404 and U405/U406. In fact U404 are just here as a current buffer because unbal to bal circuitry with U405/U406 draw some mA due to low value resistors used here. This schematic is a little bit unusual for a I/V typical application because I stay in balanced mode (also for the DAC output), looking at this U405/U406 are used for:
*cancel offset voltage from U401/U403 when relays K401/K402 are in DAC mode
*made unbal to bal conversion when relays are in analog line mode
U405/U406 are not typical single ended voltage opamp, they are differential input amplifier.
The power section of the amp is made of two amplifiers for each channel in a fully differential scheme, that's why I need balanced mode for audio low level analog just before power amp.
I stay in, I read on this forum that using an00231 spdif to i2s with asrc is normally a easy step, I understand you rather prefer going with a spdif receiver ic and manage with i2s signals. Will continue to trying make working this feature, in case of success this will save me an spdif receiver ic and I'm looking for cost killing.
Hope Xmos will have soon a manufacturing timeslot to flood all digikey/newark/mouser vendors with lots of silicons :)
Best Regards,
Florian
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Hello,__BriKs__ wrote: ↑Wed Aug 19, 2020 9:49 pm Fun facts, project build when I set -DNUM_USB_CHAN_IN to 2 (-DNUM_USB_CHAN_IN=2) and then hw relative to clock seems working:
...
I suspect I'm not far away to get it working but it seems no sense to get the project build with the line -DNUM_USB_CHAN_IN=2 because I don't want to push data from xmos to host I just want to push data from spdif to i2s :)
I know this topic is old... Do you have any news about your project?
I'm trying to do the same thing (USB or SPDIF input, I2S output). I had the same compilation error until I use this config in the makefile :
Code: Select all
XCC_FLAGS_2i2o0xxsxxx = $(BUILD_FLAGS) -DI2S_CHANS_DAC=2 -DI2S_CHANS_ADC=0 -DNUM_USB_CHAN_IN=2 -DNUM_USB_CHAN_OUT=0 \
-DMIDI=0 -DSPDIF_TX=0 -DSPDIF_RX=1 -DADAT_TX=0 -DADAT_RX=0 -DDSD_CHANS_DAC=0 -DMIXER=0
Code: Select all
/* Number of USB streaming channels - Default is 4 in 4 out */
#ifndef NUM_USB_CHAN_IN
#define NUM_USB_CHAN_IN (2) /* Device to Host */
#endif
#ifndef NUM_USB_CHAN_OUT
#define NUM_USB_CHAN_OUT (0) /* Host to Device */
#endif
/* Number of IS2 chans to DAC..*/
#ifndef I2S_CHANS_DAC
#define I2S_CHANS_DAC (2)
#endif
/* Number of I2S chans from ADC */
#ifndef I2S_CHANS_ADC
#define I2S_CHANS_ADC (0)
#endif
/* Channel index of SPDIF Rx channels (duplicated DAC channels 1/2 when index is 0) */
#define SPDIF_TX_INDEX (0)
/* Channel index of SPDIF Rx channels */
#define SPDIF_RX_INDEX (0)
https://en.wikipedia.org/wiki/S/PDIF
I think the XMOS comments on lines #define NUM_USB_CHAN are swapped. To get my project compiling with 0 ADC and 1 DAC (so, the device stream I2S OUT, and, logically, USB IN), I have to set
Code: Select all
#define NUM_USB_CHAN_IN (2) /* Device to Host */