Custom Design XU316-1024-QF60B

[occipe]

Hello,

I've built a custom board with xu316-1024-qf60b, self powered, 2 audio Clocks 24Mhz and 22Mhz (enables by 2 gpios) and an SPI flash (old 25p40)

Working under sw usb audio 7.2.0 sdk:

Dfu
I2S ouput ( Async master mode)
JTAG without xlink

In linux Ive tested in master mode, input and output should work with no device( slave) connected :

i2S on tile 0 and xud on tile 1
Speaker-test is working well in output mode
I'm unable to get I2S input working (while i2S output is OK) arecord test is stalled.

What could explain the different behaviour between I2S input and output ?

Thanks

[Ross]

Mod edit: moved to USB Audio

[infiniteimprobability]

What could explain the different behaviour between I2S input and output ?

We have to distinguish between the I2S data in/out and the clock roles of I2S. I2S data pins will always have the same job - they will drive I2S data regardless of clock role.

The clock role is different from the data - When XMOS is master (

Code: Select all

CODEC_MASTER=0

), it drives LRCLK and BCLK. When slave (

Code: Select all

CODEC_MASTER=1

) it receives LRCLK and BCLK from and external master. Our examples in sw_usb_audio normally setup the CODEC (DAC/ADC) to own the master clock if

Code: Select all

CODEC_MASTER=1

, but in a custom design you will need to ensure that the I2S LRCLK and BCLK are driven from your hardware in that mode.

If the external I2S master isn't driving then audio hub in sw_usb_audio won't loop and you'll get the problem you are seeing - no audio data/clocks are being pushed so it won't record or play properly. Also note that MCLK needs to be supplied too - we use that to calculate the feedback for the host as part of Asynch mode (where the device owns the audio clock).