Issue with 768kHz ADC Input on XMOS XU316 Not Working Properly Topic is solved

Technical questions regarding the XTC tools and programming with XMOS.
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masaikemlol
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Post by masaikemlol »

infiniteimprobability wrote: Fri Sep 20, 2024 11:02 am It's published now!

xcore.ai IO timings
Thank you for your reply, infiniteimprobability.

I’ve been busy updating the schematic for the analog section of the PCB lately, so I couldn’t respond sooner.

In the end, I also realized that it might be an IO timing issue. Thanks for your suggestions!
I will give it another try, and I’ll post any updates or good news as soon as I have them.
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fabriceo
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Post by fabriceo »

infiniteimprobability wrote: Fri Sep 20, 2024 11:02 am It's published now!

xcore.ai IO timings
Hi,
this A.N. is very precise and gives a full example with I2S Master. would be great to have another chapter detailing I2S Slave !
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infiniteimprobability
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Post by infiniteimprobability »

Noted! I2S master is a bit easier because you can delay the ADC data input so it aligns with the clock inside the xcore. Slave is harder because someone else controls the clock and we need to respond quickly and present the DAC data. So you just have to respond ASAP (no delays set) normally. Another option to buy more setup time is to delay the clock block just under one application clock cycle and present the data one clock ahead of time but it all gets a bit mind bending and the delay settings would need changing per sample rate and possibly a change to the core I2S slave code (or just use left justified mode for that case). But at least it's all isochronous and so that can be set up when I2S starts and it will hold timing until the next SR change.

We are looking at extending this app note with some timing scripts so you can plug in numbers and it will iterate through all settings to find the best data valid window. That's work in progress however and may take a while.
Engineer at XMOS