XU316* datasheet instructions for full xSYS2 header pin layout unclear

Technical discussions around xCORE processors (e.g. xcore-200 & xcore.ai).
nrs23
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Joined: Mon Aug 12, 2024 3:02 pm

XU316* datasheet instructions for full xSYS2 header pin layout unclear

Post by nrs23 »

The datasheets for e.g. the XU316-1024-QF60B, and the XU316-1024-FB265 say the following about pin 13 of the full xSYS2 header pin layout (section F4, page 76 on the datasheet of the former):
For links 0..3 you will need to connect pin 13 to VDDIOR, for links 4..6 connect it to VDDIOL,
and for link 7 use VDDIOB18.
This is very clear and unambiguous: Since I'm using XLO_0 and XLO_1 (link 0 and 1), I should connect pin 13 to VDDIOR.

HOWEVER

Diagram 52 in the same section (page 77), shows pin 13 connected to ground, and doesn't indicate any other options. ADDITIONALLY, the datasheet for the XTAG4 labels pin 13 as connected to GROUND.

If I was to follow the XU316* datasheets, that connection would be shorted when connected to the XTAG4, which doesn't sound optimal.

Could somebody point out what I'm missing, or if/where there's a mistake here?

Thanks
Joe
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Posts: 80
Joined: Sun Dec 13, 2009 1:12 am

Post by Joe »

Hi,

Many thanks for bringing this to our attention. This is an error in the datasheet. The line you refer to should read:

For links 0..3 you will need to connect pin 11 to VDDIOR, for links 4..6 connect it to VDDIOL, and for link 7 use VDDIOB18.

I'll make sure this is updated for the next datasheet revision.

It's perhaps over prescriptive ... pin 11 is simply the supply voltage reference that the xtag will use for interfacing with the xscope xlink. If the xlink is running at 1.8V IO then connect it to 1.8V, if at 3.3V then connect to 3.3V.

For the QF60B, all the signal IO (including links) run at 3.3V only so in this case pin 11 should be connected to 3V3.

Cheers,
Joe
XMOS hardware grey beard.