Yes, unless my PCBA house did a mistake.
Custom board with XUF216-512-TQ128-C20A - xrun works, xflash doesn't (solved)
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Update: Flashing was successful by adding --spi-div=8 to xflash. Which is confusing for me.
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So all the reading works from the looks of it.
Looking at your layout you have a trace on the QSPI clock (X0D10) out to somewhere else on the board - this may well cause signal integrity issues - this is now a long stub on the clock line which will cause the clock signal the flash sees to be poor.
Similar story for the other QSPI flash signals - need to make sure whatever this connects to externally doesn't affect the internal QSPI flash.
Looking at your layout you have a trace on the QSPI clock (X0D10) out to somewhere else on the board - this may well cause signal integrity issues - this is now a long stub on the clock line which will cause the clock signal the flash sees to be poor.
Similar story for the other QSPI flash signals - need to make sure whatever this connects to externally doesn't affect the internal QSPI flash.
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XMOS hardware grey beard.
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From your image board show lines on every pin. But in real life some pins is restricted... And create long open antena wires is counterfail. Yuo can have trouble not only flash fw, but too on reset boot from flash on speed used in loader. Too in schematics image isnt clear used and unused pins ...
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An update on this. This is potentially a bug introduced into the 15.3.0 tools which we confirm is fixed by running with spi-div=8. It probably isn't related to your layout although avoiding any trace stubs on the spi clock line is still recommended.
XMOS hardware grey beard.