TDM master is unreliable Topic is solved

Technical discussions around xCORE processors (e.g. xcore-200 & xcore.ai).
akirae3
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TDM master is unreliable

Post by akirae3 »

What the meaning of unreliable ?
https://github.com/xmos/sw_usb_audio/issues/99

What happens in that mode , TDM Master mode, Input ( receive ), with XU216.

To avoid that , I should use XU216 in TDM slave mode or XU316?

Thank you.
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Ross
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Post by Ross »

Remove the referenced lines if using xcore-200 based parts. The issue will be setup/hold time violations.
Technical Director @ XMOS. Opinions expressed are my own
akirae3
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Post by akirae3 »

Thank you for the information.
I will try .

And "Drive strength of the clock lines has already been increased for 316 but this is not possible on the 126" means that 216 needs buffers for clocks ( LRCK and BCLK ) ?
Last edited by akirae3 on Thu Jun 05, 2025 1:23 am, edited 1 time in total.
akirae3
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Post by akirae3 »

In addition, I have some question .

TDM input data are sampled on negative edge ?
The rising edge of fsync and bclk on TDM mode is same ?
and what is the tdm_config.offset in default (=1?) ?

regards,